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target/hexagon: Prefer fast cpu_env() over slower CPU QOM cast macro

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Mechanical patch produced running the command documented
in scripts/coccinelle/cpu_env.cocci_template header.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Brian Cain <bcain@quicinc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20240129164514.73104-12-philmd@linaro.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
This commit is contained in:
Philippe Mathieu-Daudé 2024-01-29 17:44:53 +01:00 committed by Thomas Huth
parent 2df4ab2fbc
commit 7ab7428199
2 changed files with 8 additions and 23 deletions
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25
target/hexagon/cpu.c
View File

@ -236,10 +236,7 @@ static void hexagon_dump(CPUHexagonState *env, FILE *f, int flags)
static void hexagon_dump_state(CPUState *cs, FILE *f, int flags)
{
HexagonCPU *cpu = HEXAGON_CPU(cs);
CPUHexagonState *env = &cpu->env;
hexagon_dump(env, f, flags);
hexagon_dump(cpu_env(cs), f, flags);
}
void hexagon_debug(CPUHexagonState *env)
@ -249,25 +246,19 @@ void hexagon_debug(CPUHexagonState *env)
static void hexagon_cpu_set_pc(CPUState *cs, vaddr value)
{
HexagonCPU *cpu = HEXAGON_CPU(cs);
CPUHexagonState *env = &cpu->env;
env->gpr[HEX_REG_PC] = value;
cpu_env(cs)->gpr[HEX_REG_PC] = value;
}
static vaddr hexagon_cpu_get_pc(CPUState *cs)
{
HexagonCPU *cpu = HEXAGON_CPU(cs);
CPUHexagonState *env = &cpu->env;
return env->gpr[HEX_REG_PC];
return cpu_env(cs)->gpr[HEX_REG_PC];
}
static void hexagon_cpu_synchronize_from_tb(CPUState *cs,
const TranslationBlock *tb)
{
HexagonCPU *cpu = HEXAGON_CPU(cs);
CPUHexagonState *env = &cpu->env;
tcg_debug_assert(!(cs->tcg_cflags & CF_PCREL));
env->gpr[HEX_REG_PC] = tb->pc;
cpu_env(cs)->gpr[HEX_REG_PC] = tb->pc;
}
static bool hexagon_cpu_has_work(CPUState *cs)
@ -279,18 +270,14 @@ static void hexagon_restore_state_to_opc(CPUState *cs,
const TranslationBlock *tb,
const uint64_t *data)
{
HexagonCPU *cpu = HEXAGON_CPU(cs);
CPUHexagonState *env = &cpu->env;
env->gpr[HEX_REG_PC] = data[0];
cpu_env(cs)->gpr[HEX_REG_PC] = data[0];
}
static void hexagon_cpu_reset_hold(Object *obj)
{
CPUState *cs = CPU(obj);
HexagonCPU *cpu = HEXAGON_CPU(cs);
HexagonCPUClass *mcc = HEXAGON_CPU_GET_CLASS(obj);
CPUHexagonState *env = &cpu->env;
CPUHexagonState *env = cpu_env(cs);
if (mcc->parent_phases.hold) {
mcc->parent_phases.hold(obj);

6
target/hexagon/gdbstub.c
View File

@ -22,8 +22,7 @@
int hexagon_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
{
HexagonCPU *cpu = HEXAGON_CPU(cs);
CPUHexagonState *env = &cpu->env;
CPUHexagonState *env = cpu_env(cs);
if (n == HEX_REG_P3_0_ALIASED) {
uint32_t p3_0 = 0;
@ -42,8 +41,7 @@ int hexagon_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
int hexagon_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
{
HexagonCPU *cpu = HEXAGON_CPU(cs);
CPUHexagonState *env = &cpu->env;
CPUHexagonState *env = cpu_env(cs);
if (n == HEX_REG_P3_0_ALIASED) {
uint32_t p3_0 = ldtul_p(mem_buf);