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target-arm: A64: Add support for floating point cond select

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This adds decoding support for C3.6.24 FP conditional select.

Signed-off-by: Claudio Fontana <claudio.fontana@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
This commit is contained in:
Claudio Fontana 2014-01-04 22:15:51 +00:00 committed by Peter Maydell
parent 32ca04a60f
commit 7b2440e438
1 changed files with 44 additions and 1 deletions
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45
target-arm/translate-a64.c
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@ -3304,6 +3304,20 @@ static void disas_fp_ccomp(DisasContext *s, uint32_t insn)
}
}
/* copy src FP register to dst FP register; type specifies single or double */
static void gen_mov_fp2fp(DisasContext *s, int type, int dst, int src)
{
if (type) {
TCGv_i64 v = read_fp_dreg(s, src);
write_fp_dreg(s, dst, v);
tcg_temp_free_i64(v);
} else {
TCGv_i32 v = read_fp_sreg(s, src);
write_fp_sreg(s, dst, v);
tcg_temp_free_i32(v);
}
}
/* C3.6.24 Floating point conditional select
* 31 30 29 28 24 23 22 21 20 16 15 12 11 10 9 5 4 0
* +---+---+---+-----------+------+---+------+------+-----+------+------+
@ -3312,7 +3326,36 @@ static void disas_fp_ccomp(DisasContext *s, uint32_t insn)
*/
static void disas_fp_csel(DisasContext *s, uint32_t insn)
{
unsupported_encoding(s, insn);
unsigned int mos, type, rm, cond, rn, rd;
int label_continue = -1;
mos = extract32(insn, 29, 3);
type = extract32(insn, 22, 2); /* 0 = single, 1 = double */
rm = extract32(insn, 16, 5);
cond = extract32(insn, 12, 4);
rn = extract32(insn, 5, 5);
rd = extract32(insn, 0, 5);
if (mos || type > 1) {
unallocated_encoding(s);
return;
}
if (cond < 0x0e) { /* not always */
int label_match = gen_new_label();
label_continue = gen_new_label();
arm_gen_test_cc(cond, label_match);
/* nomatch: */
gen_mov_fp2fp(s, type, rd, rm);
tcg_gen_br(label_continue);
gen_set_label(label_match);
}
gen_mov_fp2fp(s, type, rd, rn);
if (cond < 0x0e) { /* continue */
gen_set_label(label_continue);
}
}
/* C3.6.25 Floating point data-processing (1 source)