tcg/tci: Use ffi for calls
This requires adjusting where arguments are stored. Place them on the stack at left-aligned positions. Adjust the stack frame to be at entirely positive offsets. Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson
parent
bcb81061dc
commit
7b7d8b2d9a
@ -52,6 +52,7 @@
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#define MAX_OPC_PARAM (4 + (MAX_OPC_PARAM_PER_ARG * MAX_OPC_PARAM_ARGS))
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#define CPU_TEMP_BUF_NLONGS 128
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#define TCG_STATIC_FRAME_SIZE (CPU_TEMP_BUF_NLONGS * sizeof(long))
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/* Default target word size to pointer size. */
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#ifndef TCG_TARGET_REG_BITS
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64
tcg/tcg.c
64
tcg/tcg.c
@ -147,7 +147,12 @@ static void tcg_out_st(TCGContext *s, TCGType type, TCGReg arg, TCGReg arg1,
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intptr_t arg2);
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static bool tcg_out_sti(TCGContext *s, TCGType type, TCGArg val,
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TCGReg base, intptr_t ofs);
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#ifdef CONFIG_TCG_INTERPRETER
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static void tcg_out_call(TCGContext *s, const tcg_insn_unit *target,
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ffi_cif *cif);
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#else
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static void tcg_out_call(TCGContext *s, const tcg_insn_unit *target);
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#endif
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static bool tcg_target_const_match(int64_t val, TCGType type, int ct);
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#ifdef TCG_TARGET_NEED_LDST_LABELS
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static int tcg_out_ldst_finalize(TCGContext *s);
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@ -1554,25 +1559,37 @@ void tcg_gen_callN(void *func, TCGTemp *ret, int nargs, TCGTemp **args)
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for (i = 0; i < nargs; i++) {
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int argtype = extract32(typemask, (i + 1) * 3, 3);
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bool is_64bit = (argtype & ~1) == dh_typecode_i64;
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bool want_align = false;
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#if defined(CONFIG_TCG_INTERPRETER)
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/*
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* Align all arguments, so that they land in predictable places
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* for passing off to ffi_call.
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*/
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want_align = true;
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#elif defined(TCG_TARGET_CALL_ALIGN_ARGS)
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/* Some targets want aligned 64 bit args */
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want_align = is_64bit;
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#endif
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if (TCG_TARGET_REG_BITS < 64 && want_align && (real_args & 1)) {
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op->args[pi++] = TCG_CALL_DUMMY_ARG;
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real_args++;
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}
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if (TCG_TARGET_REG_BITS < 64 && is_64bit) {
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#ifdef TCG_TARGET_CALL_ALIGN_ARGS
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/* some targets want aligned 64 bit args */
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if (real_args & 1) {
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op->args[pi++] = TCG_CALL_DUMMY_ARG;
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real_args++;
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}
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#endif
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/* If stack grows up, then we will be placing successive
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arguments at lower addresses, which means we need to
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reverse the order compared to how we would normally
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treat either big or little-endian. For those arguments
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that will wind up in registers, this still works for
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HPPA (the only current STACK_GROWSUP target) since the
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argument registers are *also* allocated in decreasing
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order. If another such target is added, this logic may
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have to get more complicated to differentiate between
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stack arguments and register arguments. */
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/*
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* If stack grows up, then we will be placing successive
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* arguments at lower addresses, which means we need to
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* reverse the order compared to how we would normally
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* treat either big or little-endian. For those arguments
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* that will wind up in registers, this still works for
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* HPPA (the only current STACK_GROWSUP target) since the
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* argument registers are *also* allocated in decreasing
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* order. If another such target is added, this logic may
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* have to get more complicated to differentiate between
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* stack arguments and register arguments.
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*/
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#if defined(HOST_WORDS_BIGENDIAN) != defined(TCG_TARGET_STACK_GROWSUP)
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op->args[pi++] = temp_arg(args[i] + 1);
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op->args[pi++] = temp_arg(args[i]);
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@ -3836,6 +3853,7 @@ static void tcg_reg_alloc_call(TCGContext *s, TCGOp *op)
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const int nb_oargs = TCGOP_CALLO(op);
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const int nb_iargs = TCGOP_CALLI(op);
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const TCGLifeData arg_life = op->life;
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const TCGHelperInfo *info;
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int flags, nb_regs, i;
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TCGReg reg;
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TCGArg arg;
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@ -3847,7 +3865,8 @@ static void tcg_reg_alloc_call(TCGContext *s, TCGOp *op)
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TCGRegSet allocated_regs;
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func_addr = tcg_call_func(op);
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flags = tcg_call_flags(op);
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info = tcg_call_info(op);
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flags = info->flags;
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nb_regs = ARRAY_SIZE(tcg_target_call_iarg_regs);
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if (nb_regs > nb_iargs) {
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@ -3939,7 +3958,16 @@ static void tcg_reg_alloc_call(TCGContext *s, TCGOp *op)
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save_globals(s, allocated_regs);
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}
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#ifdef CONFIG_TCG_INTERPRETER
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{
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gpointer hash = (gpointer)(uintptr_t)info->typemask;
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ffi_cif *cif = g_hash_table_lookup(ffi_table, hash);
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assert(cif != NULL);
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tcg_out_call(s, func_addr, cif);
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}
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#else
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tcg_out_call(s, func_addr);
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#endif
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/* assign output registers and emit moves if needed */
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for(i = 0; i < nb_oargs; i++) {
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142
tcg/tci.c
142
tcg/tci.c
@ -18,45 +18,26 @@
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*/
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#include "qemu/osdep.h"
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#include "qemu-common.h"
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#include "tcg/tcg.h" /* MAX_OPC_PARAM_IARGS */
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#include "exec/cpu_ldst.h"
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#include "tcg/tcg-op.h"
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#include "qemu/compiler.h"
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#include <ffi.h>
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/* Enable TCI assertions only when debugging TCG (and without NDEBUG defined).
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* Without assertions, the interpreter runs much faster. */
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/*
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* Enable TCI assertions only when debugging TCG (and without NDEBUG defined).
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* Without assertions, the interpreter runs much faster.
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*/
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#if defined(CONFIG_DEBUG_TCG)
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# define tci_assert(cond) assert(cond)
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#else
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# define tci_assert(cond) ((void)(cond))
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#endif
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#include "qemu-common.h"
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#include "tcg/tcg.h" /* MAX_OPC_PARAM_IARGS */
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#include "exec/cpu_ldst.h"
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#include "tcg/tcg-op.h"
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#include "qemu/compiler.h"
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#if MAX_OPC_PARAM_IARGS != 6
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# error Fix needed, number of supported input arguments changed!
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#endif
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#if TCG_TARGET_REG_BITS == 32
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typedef uint64_t (*helper_function)(tcg_target_ulong, tcg_target_ulong,
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tcg_target_ulong, tcg_target_ulong,
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tcg_target_ulong, tcg_target_ulong,
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tcg_target_ulong, tcg_target_ulong,
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tcg_target_ulong, tcg_target_ulong,
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tcg_target_ulong, tcg_target_ulong);
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#else
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typedef uint64_t (*helper_function)(tcg_target_ulong, tcg_target_ulong,
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tcg_target_ulong, tcg_target_ulong,
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tcg_target_ulong, tcg_target_ulong);
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#endif
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__thread uintptr_t tci_tb_ptr;
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static tcg_target_ulong tci_read_reg(const tcg_target_ulong *regs, TCGReg index)
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{
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tci_assert(index < TCG_TARGET_NB_REGS);
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return regs[index];
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}
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static void
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tci_write_reg(tcg_target_ulong *regs, TCGReg index, tcg_target_ulong value)
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{
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@ -133,6 +114,7 @@ static tcg_target_ulong tci_read_label(const uint8_t **tb_ptr)
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* I = immediate (tcg_target_ulong)
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* l = label or pointer
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* m = immediate (TCGMemOpIdx)
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* n = immediate (call return length)
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* r = register
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* s = signed ldst offset
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*/
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@ -153,6 +135,18 @@ static void tci_args_l(const uint8_t **tb_ptr, void **l0)
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check_size(start, tb_ptr);
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}
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static void tci_args_nll(const uint8_t **tb_ptr, uint8_t *n0,
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void **l1, void **l2)
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{
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const uint8_t *start = *tb_ptr;
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*n0 = tci_read_b(tb_ptr);
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*l1 = (void *)tci_read_label(tb_ptr);
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*l2 = (void *)tci_read_label(tb_ptr);
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check_size(start, tb_ptr);
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}
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static void tci_args_rr(const uint8_t **tb_ptr,
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TCGReg *r0, TCGReg *r1)
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{
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@ -487,11 +481,14 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
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{
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const uint8_t *tb_ptr = v_tb_ptr;
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tcg_target_ulong regs[TCG_TARGET_NB_REGS];
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long tcg_temps[CPU_TEMP_BUF_NLONGS];
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uintptr_t sp_value = (uintptr_t)(tcg_temps + CPU_TEMP_BUF_NLONGS);
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uint64_t stack[(TCG_STATIC_CALL_ARGS_SIZE + TCG_STATIC_FRAME_SIZE)
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/ sizeof(uint64_t)];
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void *call_slots[TCG_STATIC_CALL_ARGS_SIZE / sizeof(uint64_t)];
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regs[TCG_AREG0] = (tcg_target_ulong)env;
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regs[TCG_REG_CALL_STACK] = sp_value;
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regs[TCG_REG_CALL_STACK] = (uintptr_t)stack;
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/* Other call_slots entries initialized at first use (see below). */
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call_slots[0] = NULL;
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tci_assert(tb_ptr);
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for (;;) {
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@ -509,40 +506,58 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
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#endif
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TCGMemOpIdx oi;
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int32_t ofs;
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void *ptr;
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void *ptr, *cif;
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/* Skip opcode and size entry. */
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tb_ptr += 2;
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switch (opc) {
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case INDEX_op_call:
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tci_args_l(&tb_ptr, &ptr);
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/*
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* Set up the ffi_avalue array once, delayed until now
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* because many TB's do not make any calls. In tcg_gen_callN,
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* we arranged for every real argument to be "left-aligned"
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* in each 64-bit slot.
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*/
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if (unlikely(call_slots[0] == NULL)) {
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for (int i = 0; i < ARRAY_SIZE(call_slots); ++i) {
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call_slots[i] = &stack[i];
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}
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}
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tci_args_nll(&tb_ptr, &len, &ptr, &cif);
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/* Helper functions may need to access the "return address" */
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tci_tb_ptr = (uintptr_t)tb_ptr;
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#if TCG_TARGET_REG_BITS == 32
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tmp64 = ((helper_function)ptr)(tci_read_reg(regs, TCG_REG_R0),
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tci_read_reg(regs, TCG_REG_R1),
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tci_read_reg(regs, TCG_REG_R2),
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tci_read_reg(regs, TCG_REG_R3),
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tci_read_reg(regs, TCG_REG_R4),
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tci_read_reg(regs, TCG_REG_R5),
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tci_read_reg(regs, TCG_REG_R6),
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tci_read_reg(regs, TCG_REG_R7),
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tci_read_reg(regs, TCG_REG_R8),
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tci_read_reg(regs, TCG_REG_R9),
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tci_read_reg(regs, TCG_REG_R10),
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tci_read_reg(regs, TCG_REG_R11));
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tci_write_reg(regs, TCG_REG_R0, tmp64);
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tci_write_reg(regs, TCG_REG_R1, tmp64 >> 32);
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#else
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tmp64 = ((helper_function)ptr)(tci_read_reg(regs, TCG_REG_R0),
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tci_read_reg(regs, TCG_REG_R1),
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tci_read_reg(regs, TCG_REG_R2),
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tci_read_reg(regs, TCG_REG_R3),
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tci_read_reg(regs, TCG_REG_R4),
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tci_read_reg(regs, TCG_REG_R5));
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tci_write_reg(regs, TCG_REG_R0, tmp64);
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#endif
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ffi_call(cif, ptr, stack, call_slots);
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/* Any result winds up "left-aligned" in the stack[0] slot. */
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switch (len) {
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case 0: /* void */
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break;
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case 1: /* uint32_t */
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/*
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* Note that libffi has an odd special case in that it will
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* always widen an integral result to ffi_arg.
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*/
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if (sizeof(ffi_arg) == 4) {
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regs[TCG_REG_R0] = *(uint32_t *)stack;
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break;
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}
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/* fall through */
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case 2: /* uint64_t */
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if (TCG_TARGET_REG_BITS == 32) {
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tci_write_reg64(regs, TCG_REG_R1, TCG_REG_R0, stack[0]);
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} else {
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regs[TCG_REG_R0] = stack[0];
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}
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break;
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default:
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g_assert_not_reached();
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}
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break;
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case INDEX_op_br:
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tci_args_l(&tb_ptr, &ptr);
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tb_ptr = ptr;
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@ -1119,7 +1134,7 @@ int print_insn_tci(bfd_vma addr, disassemble_info *info)
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TCGCond c;
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TCGMemOpIdx oi;
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uint8_t pos, len;
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void *ptr;
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void *ptr, *cif;
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const uint8_t *tb_ptr;
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status = info->read_memory_func(addr, buf, 2, info);
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@ -1147,13 +1162,18 @@ int print_insn_tci(bfd_vma addr, disassemble_info *info)
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switch (op) {
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case INDEX_op_br:
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case INDEX_op_call:
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case INDEX_op_exit_tb:
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case INDEX_op_goto_tb:
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tci_args_l(&tb_ptr, &ptr);
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info->fprintf_func(info->stream, "%-12s %p", op_name, ptr);
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break;
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case INDEX_op_call:
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tci_args_nll(&tb_ptr, &len, &ptr, &cif);
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info->fprintf_func(info->stream, "%-12s %d, %p, %p",
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op_name, len, ptr, cif);
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break;
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case INDEX_op_brcond_i32:
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case INDEX_op_brcond_i64:
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tci_args_rrcl(&tb_ptr, &r0, &r1, &c, &ptr);
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@ -192,23 +192,8 @@ static const int tcg_target_reg_alloc_order[] = {
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# error Fix needed, number of supported input arguments changed!
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#endif
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static const int tcg_target_call_iarg_regs[] = {
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TCG_REG_R0,
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TCG_REG_R1,
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TCG_REG_R2,
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TCG_REG_R3,
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TCG_REG_R4,
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TCG_REG_R5,
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#if TCG_TARGET_REG_BITS == 32
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/* 32 bit hosts need 2 * MAX_OPC_PARAM_IARGS registers. */
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TCG_REG_R6,
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TCG_REG_R7,
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TCG_REG_R8,
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TCG_REG_R9,
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TCG_REG_R10,
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TCG_REG_R11,
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#endif
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};
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/* No call arguments via registers. All will be stored on the "stack". */
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static const int tcg_target_call_iarg_regs[] = { };
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static const int tcg_target_call_oarg_regs[] = {
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TCG_REG_R0,
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@ -292,8 +277,9 @@ static void tci_out_label(TCGContext *s, TCGLabel *label)
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static void stack_bounds_check(TCGReg base, target_long offset)
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{
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if (base == TCG_REG_CALL_STACK) {
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tcg_debug_assert(offset < 0);
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tcg_debug_assert(offset >= -(CPU_TEMP_BUF_NLONGS * sizeof(long)));
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tcg_debug_assert(offset >= 0);
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tcg_debug_assert(offset < (TCG_STATIC_CALL_ARGS_SIZE +
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TCG_STATIC_FRAME_SIZE));
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}
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}
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@ -593,11 +579,25 @@ static void tcg_out_movi(TCGContext *s, TCGType type,
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}
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}
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static inline void tcg_out_call(TCGContext *s, const tcg_insn_unit *arg)
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static void tcg_out_call(TCGContext *s, const tcg_insn_unit *func,
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ffi_cif *cif)
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{
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uint8_t *old_code_ptr = s->code_ptr;
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uint8_t which;
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if (cif->rtype == &ffi_type_void) {
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which = 0;
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} else if (cif->rtype->size == 4) {
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which = 1;
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} else {
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tcg_debug_assert(cif->rtype->size == 8);
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which = 2;
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}
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tcg_out_op_t(s, INDEX_op_call);
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tcg_out_i(s, (uintptr_t)arg);
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tcg_out8(s, which);
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tcg_out_i(s, (uintptr_t)func);
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tcg_out_i(s, (uintptr_t)cif);
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old_code_ptr[1] = s->code_ptr - old_code_ptr;
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}
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@ -822,11 +822,9 @@ static void tcg_target_init(TCGContext *s)
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s->reserved_regs = 0;
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tcg_regset_set_reg(s->reserved_regs, TCG_REG_CALL_STACK);
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/* We use negative offsets from "sp" so that we can distinguish
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stores that might pretend to be call arguments. */
|
||||
tcg_set_frame(s, TCG_REG_CALL_STACK,
|
||||
-CPU_TEMP_BUF_NLONGS * sizeof(long),
|
||||
CPU_TEMP_BUF_NLONGS * sizeof(long));
|
||||
/* The call arguments come first, followed by the temp storage. */
|
||||
tcg_set_frame(s, TCG_REG_CALL_STACK, TCG_STATIC_CALL_ARGS_SIZE,
|
||||
TCG_STATIC_FRAME_SIZE);
|
||||
}
|
||||
|
||||
/* Generate global QEMU prologue and epilogue code. */
|
||||
|
||||
@ -162,7 +162,7 @@ typedef enum {
|
||||
|
||||
/* Used for function call generation. */
|
||||
#define TCG_TARGET_CALL_STACK_OFFSET 0
|
||||
#define TCG_TARGET_STACK_ALIGN 16
|
||||
#define TCG_TARGET_STACK_ALIGN 8
|
||||
|
||||
#define HAVE_TCG_QEMU_TB_EXEC
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user