ahci: fix sdb fis semantics
There are two things to fix here: The first one is subtle: the PxSACT register in the AHCI HBA has different semantics from the field it is shadowing, the ACT field in the Set Device Bits FIS. In the HBA register, PxSACT acts as a bitfield indicating outstanding NCQ commands where a set bit indicates a pending NCQ operation. The FIS field however operates as an RWC register update to PxSACT, where a set bit indicates a *successfully* completed command. Correct the FIS semantics. At the same time, move the "clear finished" action to the SDB FIS generation instead of the register read to mimick how the other shadow registers work, which always just report the last reported value from a FIS, and not the most current values which may not have been reported by a FIS yet. Lastly and more simply, SATA 3.2 section 13.6.4.2 (and later sections) all specify that the Interrupt bit for the SDB FIS should always be set to one for NCQ commands. That's currently the only time we generate this FIS, so set it on all the time. Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Message-id: 1435767578-32743-16-git-send-email-jsnow@redhat.com
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@ -106,8 +106,6 @@ static uint32_t ahci_port_read(AHCIState *s, int port, int offset)
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val = pr->scr_err;
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break;
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case PORT_SCR_ACT:
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pr->scr_act &= ~s->dev[port].finished;
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s->dev[port].finished = 0;
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val = pr->scr_act;
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break;
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case PORT_CMD_ISSUE:
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@ -666,14 +664,14 @@ static void ahci_unmap_clb_address(AHCIDevice *ad)
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ad->lst = NULL;
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}
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static void ahci_write_fis_sdb(AHCIState *s, int port, uint32_t finished)
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static void ahci_write_fis_sdb(AHCIState *s, NCQTransferState *ncq_tfs)
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{
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AHCIDevice *ad = &s->dev[port];
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AHCIDevice *ad = ncq_tfs->drive;
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AHCIPortRegs *pr = &ad->port_regs;
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IDEState *ide_state;
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SDBFIS *sdb_fis;
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if (!s->dev[port].res_fis ||
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if (!ad->res_fis ||
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!(pr->cmd & PORT_CMD_FIS_RX)) {
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return;
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}
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@ -683,19 +681,23 @@ static void ahci_write_fis_sdb(AHCIState *s, int port, uint32_t finished)
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sdb_fis->type = SATA_FIS_TYPE_SDB;
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/* Interrupt pending & Notification bit */
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sdb_fis->flags = (ad->hba->control_regs.irqstatus ? (1 << 6) : 0);
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sdb_fis->flags = 0x40; /* Interrupt bit, always 1 for NCQ */
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sdb_fis->status = ide_state->status & 0x77;
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sdb_fis->error = ide_state->error;
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/* update SAct field in SDB_FIS */
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s->dev[port].finished |= finished;
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sdb_fis->payload = cpu_to_le32(ad->finished);
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/* Update shadow registers (except BSY 0x80 and DRQ 0x08) */
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pr->tfdata = (ad->port.ifs[0].error << 8) |
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(ad->port.ifs[0].status & 0x77) |
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(pr->tfdata & 0x88);
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pr->scr_act &= ~ad->finished;
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ad->finished = 0;
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ahci_trigger_irq(s, ad, PORT_IRQ_SDB_FIS);
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/* Trigger IRQ if interrupt bit is set (which currently, it always is) */
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if (sdb_fis->flags & 0x40) {
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ahci_trigger_irq(s, ad, PORT_IRQ_SDB_FIS);
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}
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}
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static void ahci_write_fis_pio(AHCIDevice *ad, uint16_t len)
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@ -895,11 +897,14 @@ static void ncq_err(NCQTransferState *ncq_tfs)
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static void ncq_finish(NCQTransferState *ncq_tfs)
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{
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/* Clear bit for this tag in SActive */
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ncq_tfs->drive->port_regs.scr_act &= ~(1 << ncq_tfs->tag);
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/* If we didn't error out, set our finished bit. Errored commands
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* do not get a bit set for the SDB FIS ACT register, nor do they
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* clear the outstanding bit in scr_act (PxSACT). */
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if (!(ncq_tfs->drive->port_regs.scr_err & (1 << ncq_tfs->tag))) {
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ncq_tfs->drive->finished |= (1 << ncq_tfs->tag);
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}
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ahci_write_fis_sdb(ncq_tfs->drive->hba, ncq_tfs->drive->port_no,
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(1 << ncq_tfs->tag));
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ahci_write_fis_sdb(ncq_tfs->drive->hba, ncq_tfs);
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DPRINTF(ncq_tfs->drive->port_no, "NCQ transfer tag %d finished\n",
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ncq_tfs->tag);
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