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ide: support enable/disable write cache

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Enabling or disabling the write cache is done with the SET FEATURES
command.  The command can be issued with sg_sat_set_features from
sg3-utils.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
This commit is contained in:
Paolo Bonzini 2012-06-06 00:04:54 +02:00 committed by Kevin Wolf
parent e1e9b0aca0
commit 7cdd481cdf
1 changed files with 18 additions and 3 deletions
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21
hw/ide/core.c
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@ -1047,6 +1047,7 @@ static bool ide_cmd_permitted(IDEState *s, uint32_t cmd)
void ide_exec_cmd(IDEBus *bus, uint32_t val) void ide_exec_cmd(IDEBus *bus, uint32_t val)
{ {
uint16_t *identify_data;
IDEState *s; IDEState *s;
int n; int n;
int lba48 = 0; int lba48 = 0;
@ -1231,10 +1232,21 @@ void ide_exec_cmd(IDEBus *bus, uint32_t val)
goto abort_cmd; goto abort_cmd;
/* XXX: valid for CDROM ? */ /* XXX: valid for CDROM ? */
switch(s->feature) { switch(s->feature) {
case 0x02: /* write cache enable */
bdrv_set_enable_write_cache(s->bs, true);
identify_data = (uint16_t *)s->identify_data;
put_le16(identify_data + 85, (1 << 14) | (1 << 5) | 1);
s->status = READY_STAT | SEEK_STAT;
ide_set_irq(s->bus);
break;
case 0x82: /* write cache disable */
bdrv_set_enable_write_cache(s->bs, false);
identify_data = (uint16_t *)s->identify_data;
put_le16(identify_data + 85, (1 << 14) | 1);
ide_flush_cache(s);
break;
case 0xcc: /* reverting to power-on defaults enable */ case 0xcc: /* reverting to power-on defaults enable */
case 0x66: /* reverting to power-on defaults disable */ case 0x66: /* reverting to power-on defaults disable */
case 0x02: /* write cache enable */
case 0x82: /* write cache disable */
case 0xaa: /* read look-ahead enable */ case 0xaa: /* read look-ahead enable */
case 0x55: /* read look-ahead disable */ case 0x55: /* read look-ahead disable */
case 0x05: /* set advanced power management mode */ case 0x05: /* set advanced power management mode */
@ -1250,7 +1262,7 @@ void ide_exec_cmd(IDEBus *bus, uint32_t val)
break; break;
case 0x03: { /* set transfer mode */ case 0x03: { /* set transfer mode */
uint8_t val = s->nsector & 0x07; uint8_t val = s->nsector & 0x07;
uint16_t *identify_data = (uint16_t *)s->identify_data; identify_data = (uint16_t *)s->identify_data;
switch (s->nsector >> 3) { switch (s->nsector >> 3) {
case 0x00: /* pio default */ case 0x00: /* pio default */
@ -2146,6 +2158,9 @@ static int ide_drive_post_load(void *opaque, int version_id)
s->cdrom_changed = 1; s->cdrom_changed = 1;
} }
} }
if (s->identify_set) {
bdrv_set_enable_write_cache(s->bs, !!(s->identify_data[85] & (1 << 5)));
}
return 0; return 0;
} }