Revert "PPC: e500: Use new MPIC dt format"
This reverts commit 518c7fb44f2182cde943dc64f88cb2fd4e4ff6b5. It breaks new Linux guests with SMP, because IPIs get mapped to large vectors which our MPIC emulation does not implement. Conflicts: hw/ppc/e500.c
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@ -68,18 +68,18 @@ static void pci_map_create(void *fdt, uint32_t *pci_map, uint32_t mpic)
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int i;
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const uint32_t tmp[] = {
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/* IDSEL 0x11 J17 Slot 1 */
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0x8800, 0x0, 0x0, 0x1, mpic, 0x2, 0x1, 0x0, 0x0,
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0x8800, 0x0, 0x0, 0x2, mpic, 0x3, 0x1, 0x0, 0x0,
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0x8800, 0x0, 0x0, 0x3, mpic, 0x4, 0x1, 0x0, 0x0,
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0x8800, 0x0, 0x0, 0x4, mpic, 0x1, 0x1, 0x0, 0x0,
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0x8800, 0x0, 0x0, 0x1, mpic, 0x2, 0x1,
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0x8800, 0x0, 0x0, 0x2, mpic, 0x3, 0x1,
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0x8800, 0x0, 0x0, 0x3, mpic, 0x4, 0x1,
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0x8800, 0x0, 0x0, 0x4, mpic, 0x1, 0x1,
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/* IDSEL 0x12 J16 Slot 2 */
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0x9000, 0x0, 0x0, 0x1, mpic, 0x3, 0x1, 0x0, 0x0,
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0x9000, 0x0, 0x0, 0x2, mpic, 0x4, 0x1, 0x0, 0x0,
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0x9000, 0x0, 0x0, 0x3, mpic, 0x2, 0x1, 0x0, 0x0,
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0x9000, 0x0, 0x0, 0x4, mpic, 0x1, 0x1, 0x0, 0x0,
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0x9000, 0x0, 0x0, 0x1, mpic, 0x3, 0x1,
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0x9000, 0x0, 0x0, 0x2, mpic, 0x4, 0x1,
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0x9000, 0x0, 0x0, 0x3, mpic, 0x2, 0x1,
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0x9000, 0x0, 0x0, 0x4, mpic, 0x1, 0x1,
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};
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for (i = 0; i < ARRAY_SIZE(tmp); i++) {
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for (i = 0; i < (7 * 8); i++) {
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pci_map[i] = cpu_to_be32(tmp[i]);
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}
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}
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@ -97,7 +97,7 @@ static void dt_serial_create(void *fdt, unsigned long long offset,
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qemu_devtree_setprop_cells(fdt, ser, "reg", offset, 0x100);
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qemu_devtree_setprop_cell(fdt, ser, "cell-index", idx);
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qemu_devtree_setprop_cell(fdt, ser, "clock-frequency", 0);
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qemu_devtree_setprop_cells(fdt, ser, "interrupts", 42, 2, 0, 0);
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qemu_devtree_setprop_cells(fdt, ser, "interrupts", 42, 2);
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qemu_devtree_setprop_phandle(fdt, ser, "interrupt-parent", mpic);
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qemu_devtree_setprop_string(fdt, "/aliases", alias, ser);
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@ -127,7 +127,7 @@ static int ppce500_load_device_tree(CPUPPCState *env,
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uint32_t mpic_ph;
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char gutil[128];
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char pci[128];
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uint32_t pci_map[9 * 8];
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uint32_t pci_map[7 * 8];
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uint32_t pci_ranges[14] =
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{
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0x2000000, 0x0, 0xc0000000,
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@ -274,18 +274,15 @@ static int ppce500_load_device_tree(CPUPPCState *env,
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MPC8544_MPIC_REGS_BASE - MPC8544_CCSRBAR_BASE);
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qemu_devtree_add_subnode(fdt, mpic);
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qemu_devtree_setprop_string(fdt, mpic, "device_type", "open-pic");
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qemu_devtree_setprop_string(fdt, mpic, "compatible", "fsl,mpic");
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qemu_devtree_setprop_string(fdt, mpic, "compatible", "chrp,open-pic");
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qemu_devtree_setprop_cells(fdt, mpic, "reg", MPC8544_MPIC_REGS_BASE -
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MPC8544_CCSRBAR_BASE, 0x40000);
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qemu_devtree_setprop_cell(fdt, mpic, "#address-cells", 0);
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qemu_devtree_setprop_cell(fdt, mpic, "#interrupt-cells", 4);
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qemu_devtree_setprop_cell(fdt, mpic, "#interrupt-cells", 2);
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mpic_ph = qemu_devtree_alloc_phandle(fdt);
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qemu_devtree_setprop_cell(fdt, mpic, "phandle", mpic_ph);
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qemu_devtree_setprop_cell(fdt, mpic, "linux,phandle", mpic_ph);
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qemu_devtree_setprop(fdt, mpic, "interrupt-controller", NULL, 0);
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qemu_devtree_setprop(fdt, mpic, "big-endian", NULL, 0);
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qemu_devtree_setprop(fdt, mpic, "single-cpu-affinity", NULL, 0);
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qemu_devtree_setprop_cell(fdt, mpic, "last-interrupt-source", 255);
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/*
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* We have to generate ser1 first, because Linux takes the first
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@ -315,7 +312,7 @@ static int ppce500_load_device_tree(CPUPPCState *env,
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pci_map_create(fdt, pci_map, qemu_devtree_get_phandle(fdt, mpic));
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qemu_devtree_setprop(fdt, pci, "interrupt-map", pci_map, sizeof(pci_map));
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qemu_devtree_setprop_phandle(fdt, pci, "interrupt-parent", mpic);
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qemu_devtree_setprop_cells(fdt, pci, "interrupts", 24, 2, 0, 0);
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qemu_devtree_setprop_cells(fdt, pci, "interrupts", 24, 2);
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qemu_devtree_setprop_cells(fdt, pci, "bus-range", 0, 255);
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for (i = 0; i < 14; i++) {
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pci_ranges[i] = cpu_to_be32(pci_ranges[i]);
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