target-arm: Wire up HLT 0xf000 as the A64 semihosting instruction
For the A64 instruction set, the semihosting call instruction is 'HLT 0xf000'. Wire this up to call do_arm_semihosting() if semihosting is enabled. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Christopher Covington <christopher.covington@linaro.org> Tested-by: Christopher Covington <cov@codeaurora.org> Message-id: 1439483745-28752-10-git-send-email-peter.maydell@linaro.org
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@ -1052,6 +1052,9 @@ void cpu_loop(CPUARMState *env)
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queue_signal(env, info.si_signo, &info);
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}
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break;
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case EXCP_SEMIHOST:
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env->xregs[0] = do_arm_semihosting(env);
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break;
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default:
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fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
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trapnr);
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@ -56,6 +56,7 @@
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#define EXCP_SMC 13 /* Secure Monitor Call */
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#define EXCP_VIRQ 14
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#define EXCP_VFIQ 15
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#define EXCP_SEMIHOST 16 /* semihosting call (A64 only) */
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#define ARMV7M_EXCP_RESET 1
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#define ARMV7M_EXCP_NMI 2
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@ -514,6 +514,12 @@ void aarch64_cpu_do_interrupt(CPUState *cs)
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case EXCP_VFIQ:
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addr += 0x100;
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break;
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case EXCP_SEMIHOST:
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qemu_log_mask(CPU_LOG_INT,
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"...handling as semihosting call 0x%" PRIx64 "\n",
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env->xregs[0]);
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env->xregs[0] = do_arm_semihosting(env);
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return;
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default:
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cpu_abort(cs, "Unhandled exception 0x%x\n", cs->exception_index);
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}
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@ -36,6 +36,7 @@ static inline bool excp_is_internal(int excp)
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|| excp == EXCP_HALTED
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|| excp == EXCP_EXCEPTION_EXIT
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|| excp == EXCP_KERNEL_TRAP
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|| excp == EXCP_SEMIHOST
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|| excp == EXCP_STREX;
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}
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@ -58,6 +59,7 @@ static const char * const excnames[] = {
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[EXCP_SMC] = "Secure Monitor Call",
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[EXCP_VIRQ] = "Virtual IRQ",
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[EXCP_VFIQ] = "Virtual FIQ",
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[EXCP_SEMIHOST] = "Semihosting call",
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};
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static inline void arm_log_exception(int idx)
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@ -30,6 +30,7 @@
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#include "internals.h"
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#include "qemu/host-utils.h"
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#include "exec/semihost.h"
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#include "exec/gen-icount.h"
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#include "exec/helper-proto.h"
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@ -1553,9 +1554,28 @@ static void disas_exc(DisasContext *s, uint32_t insn)
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unallocated_encoding(s);
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break;
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}
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/* HLT */
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/* HLT. This has two purposes.
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* Architecturally, it is an external halting debug instruction.
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* Since QEMU doesn't implement external debug, we treat this as
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* it is required for halting debug disabled: it will UNDEF.
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* Secondly, "HLT 0xf000" is the A64 semihosting syscall instruction.
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*/
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if (semihosting_enabled() && imm16 == 0xf000) {
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#ifndef CONFIG_USER_ONLY
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/* In system mode, don't allow userspace access to semihosting,
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* to provide some semblance of security (and for consistency
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* with our 32-bit semihosting).
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*/
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if (s->current_el == 0) {
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unsupported_encoding(s, insn);
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break;
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}
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#endif
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gen_exception_internal_insn(s, 0, EXCP_SEMIHOST);
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} else {
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unsupported_encoding(s, insn);
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}
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break;
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case 5:
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if (op2_ll < 1 || op2_ll > 3) {
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unallocated_encoding(s);
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