target/hppa: Skeleton support for hppa-softmmu
With the addition of default-configs/hppa-softmmu.mak, this will compile. It is not enabled with this patch, however. Signed-off-by: Helge Deller <deller@gmx.de> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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6521130b0a
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@ -53,6 +53,8 @@ int graphic_depth = 32;
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#define QEMU_ARCH QEMU_ARCH_CRIS
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#define QEMU_ARCH QEMU_ARCH_CRIS
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#elif defined(TARGET_I386)
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#elif defined(TARGET_I386)
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#define QEMU_ARCH QEMU_ARCH_I386
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#define QEMU_ARCH QEMU_ARCH_I386
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#elif defined(TARGET_HPPA)
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#define QEMU_ARCH QEMU_ARCH_HPPA
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#elif defined(TARGET_M68K)
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#elif defined(TARGET_M68K)
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#define QEMU_ARCH QEMU_ARCH_M68K
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#define QEMU_ARCH QEMU_ARCH_M68K
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#elif defined(TARGET_LM32)
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#elif defined(TARGET_LM32)
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1
hw/hppa/Makefile.objs
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1
hw/hppa/Makefile.objs
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obj-y += machine.o
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38
hw/hppa/machine.c
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38
hw/hppa/machine.c
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/*
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* QEMU HPPA hardware system emulator.
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* Copyright 2018 Helge Deller <deller@gmx.de>
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*/
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#include "qemu/osdep.h"
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#include "qemu-common.h"
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#include "cpu.h"
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#include "hw/hw.h"
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#include "elf.h"
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#include "hw/loader.h"
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#include "hw/boards.h"
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#include "qemu/error-report.h"
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#include "sysemu/sysemu.h"
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#include "hw/timer/mc146818rtc.h"
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#include "hw/ide.h"
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#include "hw/timer/i8254.h"
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#include "hw/char/serial.h"
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#include "qemu/cutils.h"
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#include "qapi/error.h"
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static void machine_hppa_init(MachineState *machine)
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{
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}
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static void machine_hppa_machine_init(MachineClass *mc)
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{
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mc->desc = "HPPA generic machine";
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mc->init = machine_hppa_init;
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mc->block_default_type = IF_SCSI;
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mc->max_cpus = 1;
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mc->is_default = 1;
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mc->default_ram_size = 512 * M_BYTE;
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mc->default_boot_order = "cd";
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}
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DEFINE_MACHINE("hppa", machine_hppa_machine_init)
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@ -24,6 +24,7 @@ enum {
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QEMU_ARCH_MOXIE = (1 << 15),
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QEMU_ARCH_MOXIE = (1 << 15),
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QEMU_ARCH_TRICORE = (1 << 16),
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QEMU_ARCH_TRICORE = (1 << 16),
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QEMU_ARCH_NIOS2 = (1 << 17),
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QEMU_ARCH_NIOS2 = (1 << 17),
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QEMU_ARCH_HPPA = (1 << 18),
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};
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};
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extern const uint32_t arch_type;
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extern const uint32_t arch_type;
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@ -1 +1 @@
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obj-y += translate.o helper.o cpu.o op_helper.o gdbstub.o
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obj-y += translate.o helper.o cpu.o op_helper.o gdbstub.o mem_helper.o
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@ -132,7 +132,12 @@ static void hppa_cpu_class_init(ObjectClass *oc, void *data)
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cc->synchronize_from_tb = hppa_cpu_synchronize_from_tb;
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cc->synchronize_from_tb = hppa_cpu_synchronize_from_tb;
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cc->gdb_read_register = hppa_cpu_gdb_read_register;
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cc->gdb_read_register = hppa_cpu_gdb_read_register;
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cc->gdb_write_register = hppa_cpu_gdb_write_register;
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cc->gdb_write_register = hppa_cpu_gdb_write_register;
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#ifdef CONFIG_USER_ONLY
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cc->handle_mmu_fault = hppa_cpu_handle_mmu_fault;
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cc->handle_mmu_fault = hppa_cpu_handle_mmu_fault;
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#else
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cc->get_phys_page_debug = hppa_cpu_get_phys_page_debug;
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#endif
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cc->disas_set_info = hppa_cpu_disas_set_info;
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cc->disas_set_info = hppa_cpu_disas_set_info;
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cc->tcg_initialize = hppa_translate_init;
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cc->tcg_initialize = hppa_translate_init;
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@ -134,6 +134,7 @@ void cpu_hppa_loaded_fr0(CPUHPPAState *env);
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int cpu_hppa_signal_handler(int host_signum, void *pinfo, void *puc);
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int cpu_hppa_signal_handler(int host_signum, void *pinfo, void *puc);
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int hppa_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int size,
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int hppa_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int size,
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int rw, int midx);
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int rw, int midx);
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hwaddr hppa_cpu_get_phys_page_debug(CPUState *cs, vaddr addr);
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int hppa_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
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int hppa_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
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int hppa_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
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int hppa_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
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void hppa_cpu_do_interrupt(CPUState *cpu);
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void hppa_cpu_do_interrupt(CPUState *cpu);
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@ -65,16 +65,6 @@ void cpu_hppa_put_psw(CPUHPPAState *env, target_ulong psw)
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env->psw_cb = cb;
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env->psw_cb = cb;
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}
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}
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int hppa_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int size,
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int rw, int mmu_idx)
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{
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HPPACPU *cpu = HPPA_CPU(cs);
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cs->exception_index = EXCP_SIGSEGV;
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cpu->env.ior = address;
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return 1;
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}
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void hppa_cpu_do_interrupt(CPUState *cs)
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void hppa_cpu_do_interrupt(CPUState *cs)
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{
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{
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HPPACPU *cpu = HPPA_CPU(cs);
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HPPACPU *cpu = HPPA_CPU(cs);
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54
target/hppa/mem_helper.c
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54
target/hppa/mem_helper.c
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/*
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* HPPA memory access helper routines
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*
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* Copyright (c) 2017 Helge Deller
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include "qemu/osdep.h"
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#include "cpu.h"
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#include "exec/exec-all.h"
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#include "exec/helper-proto.h"
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#include "qom/cpu.h"
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#ifdef CONFIG_USER_ONLY
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int hppa_cpu_handle_mmu_fault(CPUState *cs, vaddr address,
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int size, int rw, int mmu_idx)
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{
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HPPACPU *cpu = HPPA_CPU(cs);
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cs->exception_index = EXCP_SIGSEGV;
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cpu->env.ior = address;
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return 1;
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}
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#else
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hwaddr hppa_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
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{
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/* Stub */
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return addr;
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}
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void tlb_fill(CPUState *cs, target_ulong addr, MMUAccessType type,
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int mmu_idx, uintptr_t retaddr)
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{
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/* Stub */
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int prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC;
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hwaddr phys = addr;
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/* Success! Store the translation into the QEMU TLB. */
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tlb_set_page(cs, addr & TARGET_PAGE_MASK, phys & TARGET_PAGE_MASK,
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prot, mmu_idx, TARGET_PAGE_SIZE);
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}
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#endif /* CONFIG_USER_ONLY */
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@ -58,9 +58,9 @@ void HELPER(tcond)(CPUHPPAState *env, target_ulong cond)
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static void atomic_store_3(CPUHPPAState *env, target_ulong addr, uint32_t val,
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static void atomic_store_3(CPUHPPAState *env, target_ulong addr, uint32_t val,
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uint32_t mask, uintptr_t ra)
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uint32_t mask, uintptr_t ra)
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{
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{
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#ifdef CONFIG_USER_ONLY
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uint32_t old, new, cmp;
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uint32_t old, new, cmp;
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#ifdef CONFIG_USER_ONLY
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uint32_t *haddr = g2h(addr - 1);
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uint32_t *haddr = g2h(addr - 1);
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old = *haddr;
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old = *haddr;
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while (1) {
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while (1) {
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@ -72,7 +72,8 @@ static void atomic_store_3(CPUHPPAState *env, target_ulong addr, uint32_t val,
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old = cmp;
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old = cmp;
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}
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}
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#else
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#else
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#error "Not implemented."
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/* FIXME -- we can do better. */
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cpu_loop_exit_atomic(ENV_GET_CPU(env), ra);
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#endif
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#endif
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}
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}
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@ -158,12 +159,20 @@ void HELPER(stby_e_parallel)(CPUHPPAState *env, target_ulong addr,
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target_ulong HELPER(probe_r)(target_ulong addr)
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target_ulong HELPER(probe_r)(target_ulong addr)
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{
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{
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#ifdef CONFIG_USER_ONLY
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return page_check_range(addr, 1, PAGE_READ);
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return page_check_range(addr, 1, PAGE_READ);
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#else
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return 1; /* FIXME */
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#endif
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}
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}
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target_ulong HELPER(probe_w)(target_ulong addr)
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target_ulong HELPER(probe_w)(target_ulong addr)
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{
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{
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#ifdef CONFIG_USER_ONLY
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return page_check_range(addr, 1, PAGE_WRITE);
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return page_check_range(addr, 1, PAGE_WRITE);
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#else
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return 1; /* FIXME */
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#endif
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}
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}
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void HELPER(loaded_fr0)(CPUHPPAState *env)
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void HELPER(loaded_fr0)(CPUHPPAState *env)
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