Fix coprocessor register types.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4866 c046a42c-6fe2-441c-8c8c-71466251a162
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@ -36,6 +36,17 @@
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//#define DEBUG_DISPATCH 1
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/* Fake floating point. */
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#define TCG_TYPE_F32 TCG_TYPE_I32
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#define TCG_TYPE_F64 TCG_TYPE_I64
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#define tcg_gen_mov_f64 tcg_gen_mov_i64
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#define tcg_gen_qemu_ldf32 tcg_gen_qemu_ld32u
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#define tcg_gen_qemu_ldf64 tcg_gen_qemu_ld64
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#define tcg_gen_qemu_stf32 tcg_gen_qemu_st32
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#define tcg_gen_qemu_stf64 tcg_gen_qemu_st64
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#define gen_helper_pack_32_f32 tcg_gen_mov_i32
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#define gen_helper_pack_f32_32 tcg_gen_mov_i32
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#define DEFO32(name, offset) static TCGv QREG_##name;
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#define DEFO64(name, offset) static TCGv QREG_##name;
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#define DEFF64(name, offset) static TCGv QREG_##name;
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@ -91,13 +102,13 @@ void m68k_tcg_init(void)
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offsetof(CPUM68KState, aregs[i]), p);
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p += 3;
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sprintf(p, "F%d", i);
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cpu_fregs[i] = tcg_global_mem_new(TCG_TYPE_I32, TCG_AREG0,
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cpu_fregs[i] = tcg_global_mem_new(TCG_TYPE_F64, TCG_AREG0,
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offsetof(CPUM68KState, fregs[i]), p);
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p += 3;
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}
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for (i = 0; i < 4; i++) {
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sprintf(p, "ACC%d", i);
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cpu_macc[i] = tcg_global_mem_new(TCG_TYPE_I32, TCG_AREG0,
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cpu_macc[i] = tcg_global_mem_new(TCG_TYPE_I64, TCG_AREG0,
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offsetof(CPUM68KState, macc[i]), p);
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p += 5;
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}
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@ -172,17 +183,6 @@ typedef void (*disas_proc)(DisasContext *, uint16_t);
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/* FIXME: Remove this. */
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#define gen_im32(val) tcg_const_i32(val)
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/* Fake floating point. */
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#define TCG_TYPE_F32 TCG_TYPE_I32
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#define TCG_TYPE_F64 TCG_TYPE_I64
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#define tcg_gen_mov_f64 tcg_gen_mov_i64
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#define tcg_gen_qemu_ldf32 tcg_gen_qemu_ld32u
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#define tcg_gen_qemu_ldf64 tcg_gen_qemu_ld64
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#define tcg_gen_qemu_stf32 tcg_gen_qemu_st32
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#define tcg_gen_qemu_stf64 tcg_gen_qemu_st64
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#define gen_helper_pack_32_f32 tcg_gen_mov_i32
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#define gen_helper_pack_f32_32 tcg_gen_mov_i32
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#define QMODE_I32 TCG_TYPE_I32
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#define QMODE_I64 TCG_TYPE_I64
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#define QMODE_F32 TCG_TYPE_F32
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