s390x/tcg: Implement VECTOR FP DIVIDE
We can reuse most of the infrastructure added for VECTOR FP ADD. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
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@ -274,6 +274,8 @@ DEF_HELPER_FLAGS_4(gvec_vcgd64, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
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DEF_HELPER_FLAGS_4(gvec_vcgd64s, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
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DEF_HELPER_FLAGS_4(gvec_vclgd64, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
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DEF_HELPER_FLAGS_4(gvec_vclgd64s, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
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DEF_HELPER_FLAGS_5(gvec_vfd64, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
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DEF_HELPER_FLAGS_5(gvec_vfd64s, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
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#ifndef CONFIG_USER_ONLY
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DEF_HELPER_3(servc, i32, env, i64, i64)
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@ -1226,6 +1226,8 @@
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F(0xe7c2, VCGD, VRR_a, V, 0, 0, 0, 0, vcdg, 0, IF_VEC)
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/* VECTOR FP CONVERT TO LOGICAL 64-BIT */
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F(0xe7c0, VCLGD, VRR_a, V, 0, 0, 0, 0, vcdg, 0, IF_VEC)
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/* VECTOR FP DIVIDE */
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F(0xe7e5, VFD, VRR_c, V, 0, 0, 0, 0, vfa, 0, IF_VEC)
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#ifndef CONFIG_USER_ONLY
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/* COMPARE AND SWAP AND PURGE */
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@ -2560,6 +2560,9 @@ static DisasJumpType op_vfa(DisasContext *s, DisasOps *o)
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case 0xe3:
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fn = se ? gen_helper_gvec_vfa64s : gen_helper_gvec_vfa64;
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break;
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case 0xe5:
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fn = se ? gen_helper_gvec_vfd64s : gen_helper_gvec_vfd64;
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break;
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default:
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g_assert_not_reached();
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}
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@ -369,3 +369,20 @@ void HELPER(gvec_vclgd64s)(void *v1, const void *v2, CPUS390XState *env,
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vop64_2(v1, v2, env, true, XxC, erm, vclgd64, GETPC());
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}
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static uint64_t vfd64(uint64_t a, uint64_t b, float_status *s)
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{
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return float64_div(a, b, s);
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}
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void HELPER(gvec_vfd64)(void *v1, const void *v2, const void *v3,
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CPUS390XState *env, uint32_t desc)
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{
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vop64_3(v1, v2, v3, env, false, vfd64, GETPC());
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}
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void HELPER(gvec_vfd64s)(void *v1, const void *v2, const void *v3,
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CPUS390XState *env, uint32_t desc)
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{
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vop64_3(v1, v2, v3, env, true, vfd64, GETPC());
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}
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