ppc/virtex_ml507: Define macros for irq/memory maps
Define macros for the interrupt and memory maps for the sake of self documentation. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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@ -45,6 +45,14 @@
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#define EPAPR_MAGIC (0x45504150)
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#define FLASH_SIZE (16 * 1024 * 1024)
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#define INTC_BASEADDR 0x81800000
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#define UART16550_BASEADDR 0x83e01003
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#define TIMER_BASEADDR 0x83c00000
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#define PFLASH_BASEADDR 0xfc000000
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#define TIMER_IRQ 3
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#define UART16550_IRQ 9
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static struct boot_info
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{
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uint32_t bootstrap_pc;
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@ -204,7 +212,7 @@ static void virtex_init(QEMUMachineInitArgs *args)
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memory_region_add_subregion(address_space_mem, ram_base, phys_ram);
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dinfo = drive_get(IF_PFLASH, 0, 0);
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pflash_cfi01_register(0xfc000000, NULL, "virtex.flash", FLASH_SIZE,
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pflash_cfi01_register(PFLASH_BASEADDR, NULL, "virtex.flash", FLASH_SIZE,
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dinfo ? dinfo->bdrv : NULL, (64 * 1024),
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FLASH_SIZE >> 16,
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1, 0x89, 0x18, 0x0000, 0x0, 1);
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@ -215,8 +223,8 @@ static void virtex_init(QEMUMachineInitArgs *args)
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irq[i] = qdev_get_gpio_in(dev, i);
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}
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serial_mm_init(address_space_mem, 0x83e01003ULL, 2, irq[9], 115200,
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serial_hds[0], DEVICE_LITTLE_ENDIAN);
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serial_mm_init(address_space_mem, UART16550_BASEADDR, 2, irq[UART16550_IRQ],
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115200, serial_hds[0], DEVICE_LITTLE_ENDIAN);
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/* 2 timers at irq 2 @ 62 Mhz. */
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xilinx_timer_create(0x83c00000, irq[3], 0, 62 * 1000000);
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