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target-ppc: remove powerpc 970gx 

The 970GX definition was added in 2007 and it made sense then but this
version has never been released to the markets and it does not exist in
the real world so there is no point in emulating it.

This removes 970GX.

Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Signed-off-by: Alexander Graf <agraf@suse.de>
This commit is contained in:
Alexey Kardashevskiy 2013-12-20 17:41:31 +11:00 committed by Alexander Graf
parent 6475c9f05c
commit 81d2fb4dfd
4 changed files with 0 additions and 112 deletions
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9
target-ppc/STATUS
View File

@ -377,15 +377,6 @@ MMU OK
EXCP KO partially implemented
Remarks: Should be able to boot but there is no hw platform currently emulated.
PowerPC 970GX:
INSN KO Altivec missing and more
SPR KO
MSR ?
IRQ OK
MMU OK
EXCP KO partially implemented
Remarks: Should be able to boot but there is no hw platform currently emulated.
PowerPC Cell:
INSN KO Altivec missing and more
SPR KO

2
target-ppc/cpu-models.c
View File

@ -1156,8 +1156,6 @@
"PowerPC 970FX v3.0 (G5)")
POWERPC_DEF("970fx_v3.1", CPU_POWERPC_970FX_v31, 970FX,
"PowerPC 970FX v3.1 (G5)")
POWERPC_DEF("970gx", CPU_POWERPC_970GX, 970GX,
"PowerPC 970GX (G5)")
POWERPC_DEF("970mp_v1.0", CPU_POWERPC_970MP_v10, 970MP,
"PowerPC 970MP v1.0")
POWERPC_DEF("970mp_v1.1", CPU_POWERPC_970MP_v11, 970MP,

1
target-ppc/cpu-models.h
View File

@ -570,7 +570,6 @@ enum {
CPU_POWERPC_970FX_v21 = 0x003C0201,
CPU_POWERPC_970FX_v30 = 0x003C0300,
CPU_POWERPC_970FX_v31 = 0x003C0301,
CPU_POWERPC_970GX = 0x00450000,
CPU_POWERPC_970MP_v10 = 0x00440100,
CPU_POWERPC_970MP_v11 = 0x00440101,
#define CPU_POWERPC_CELL CPU_POWERPC_CELL_v32

100
target-ppc/translate_init.c
View File

@ -6830,106 +6830,6 @@ POWERPC_FAMILY(970FX)(ObjectClass *oc, void *data)
POWERPC_FLAG_BUS_CLK;
}
static int check_pow_970GX (CPUPPCState *env)
{
if (env->spr[SPR_HID0] & 0x00600000)
return 1;
return 0;
}
static void init_proc_970GX (CPUPPCState *env)
{
gen_spr_ne_601(env);
gen_spr_7xx(env);
/* Time base */
gen_tbl(env);
/* Hardware implementation registers */
/* XXX : not implemented */
spr_register(env, SPR_HID0, "HID0",
SPR_NOACCESS, SPR_NOACCESS,
&spr_read_generic, &spr_write_clear,
0x60000000);
/* XXX : not implemented */
spr_register(env, SPR_HID1, "HID1",
SPR_NOACCESS, SPR_NOACCESS,
&spr_read_generic, &spr_write_generic,
0x00000000);
/* XXX : not implemented */
spr_register(env, SPR_750FX_HID2, "HID2",
SPR_NOACCESS, SPR_NOACCESS,
&spr_read_generic, &spr_write_generic,
0x00000000);
/* XXX : not implemented */
spr_register(env, SPR_970_HID5, "HID5",
SPR_NOACCESS, SPR_NOACCESS,
&spr_read_generic, &spr_write_generic,
POWERPC970_HID5_INIT);
/* XXX : not implemented */
spr_register(env, SPR_L2CR, "L2CR",
SPR_NOACCESS, SPR_NOACCESS,
&spr_read_generic, spr_access_nop,
0x00000000);
/* Memory management */
/* XXX: not correct */
gen_low_BATs(env);
/* XXX : not implemented */
spr_register(env, SPR_MMUCFG, "MMUCFG",
SPR_NOACCESS, SPR_NOACCESS,
&spr_read_generic, SPR_NOACCESS,
0x00000000); /* TOFIX */
/* XXX : not implemented */
spr_register(env, SPR_MMUCSR0, "MMUCSR0",
SPR_NOACCESS, SPR_NOACCESS,
&spr_read_generic, &spr_write_generic,
0x00000000); /* TOFIX */
spr_register(env, SPR_HIOR, "SPR_HIOR",
SPR_NOACCESS, SPR_NOACCESS,
&spr_read_hior, &spr_write_hior,
0x00000000);
#if !defined(CONFIG_USER_ONLY)
env->slb_nr = 32;
#endif
init_excp_970(env);
env->dcache_line_size = 128;
env->icache_line_size = 128;
/* Allocate hardware IRQ controller */
ppc970_irq_init(env);
/* Can't find information on what this should be on reset. This
* value is the one used by 74xx processors. */
vscr_init(env, 0x00010000);
}
POWERPC_FAMILY(970GX)(ObjectClass *oc, void *data)
{
DeviceClass *dc = DEVICE_CLASS(oc);
PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc);
dc->desc = "PowerPC 970 GX";
pcc->init_proc = init_proc_970GX;
pcc->check_pow = check_pow_970GX;
pcc->insns_flags = PPC_INSNS_BASE | PPC_STRING | PPC_MFTB |
PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES |
PPC_FLOAT_FSQRT | PPC_FLOAT_FRSQRTE |
PPC_FLOAT_STFIWX |
PPC_CACHE | PPC_CACHE_ICBI | PPC_CACHE_DCBZ |
PPC_MEM_SYNC | PPC_MEM_EIEIO |
PPC_MEM_TLBIE | PPC_MEM_TLBSYNC |
PPC_64B | PPC_ALTIVEC |
PPC_SEGMENT_64B | PPC_SLBI;
pcc->msr_mask = 0x800000000204FF36ULL;
pcc->mmu_model = POWERPC_MMU_64B;
#if defined(CONFIG_SOFTMMU)
pcc->handle_mmu_fault = ppc_hash64_handle_mmu_fault;
#endif
pcc->excp_model = POWERPC_EXCP_970;
pcc->bus_model = PPC_FLAGS_INPUT_970;
pcc->bfd_mach = bfd_mach_ppc64;
pcc->flags = POWERPC_FLAG_VRE | POWERPC_FLAG_SE |
POWERPC_FLAG_BE | POWERPC_FLAG_PMM |
POWERPC_FLAG_BUS_CLK;
}
static int check_pow_970MP (CPUPPCState *env)
{
if (env->spr[SPR_HID0] & 0x01C00000)