target/sparc: Fix ASI_USERTXT for Solaris gdb crashes
-----BEGIN PGP SIGNATURE----- iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmYZt4kdHHJpY2hhcmQu aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV9B4Qf/eWD0DszuAJIVUBAc kfF+Ii+6MSbJG2kGEhbE8FeuiDJfqog+JLUf0UU0wUOy0OxwUraL6xxTszCYbwd8 GsIF5C0lXXi4hfsnkX86uD0C6mnvmh2v0Ol3S/SDvTmPT/w+LrrvIr0JLwWK9K/E oC4O8FuECxyc/DWcONelz5Mqzs0TgFG2aBXugmyKRdj7k5zlAoc7V6qQko/gh+Gq bd9N/a7TWNzZaedvvoDMaa4dA/5DZ+PCu7MnXdKyrmj/wFK7GGDdsw51LWY3MeUY rwv6ESFjHFC3jdRtuLOuiCvVdP/jVeimF537iGYs2AblvrUn9uhSi5vspUUrirQ3 +f5K6w== =fsfq -----END PGP SIGNATURE----- Merge tag 'pull-sp-20240412' of https://gitlab.com/rth7680/qemu into staging target/sparc: Fix ASI_USERTXT for Solaris gdb crashes # -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmYZt4kdHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV9B4Qf/eWD0DszuAJIVUBAc # kfF+Ii+6MSbJG2kGEhbE8FeuiDJfqog+JLUf0UU0wUOy0OxwUraL6xxTszCYbwd8 # GsIF5C0lXXi4hfsnkX86uD0C6mnvmh2v0Ol3S/SDvTmPT/w+LrrvIr0JLwWK9K/E # oC4O8FuECxyc/DWcONelz5Mqzs0TgFG2aBXugmyKRdj7k5zlAoc7V6qQko/gh+Gq # bd9N/a7TWNzZaedvvoDMaa4dA/5DZ+PCu7MnXdKyrmj/wFK7GGDdsw51LWY3MeUY # rwv6ESFjHFC3jdRtuLOuiCvVdP/jVeimF537iGYs2AblvrUn9uhSi5vspUUrirQ3 # +f5K6w== # =fsfq # -----END PGP SIGNATURE----- # gpg: Signature made Fri 12 Apr 2024 23:36:57 BST # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * tag 'pull-sp-20240412' of https://gitlab.com/rth7680/qemu: target/sparc: Use GET_ASI_CODE for ASI_KERNELTXT and ASI_USERTXT Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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commit
824ebb92c3
@ -32,6 +32,9 @@ DEF_HELPER_FLAGS_3(udiv, TCG_CALL_NO_WG, i64, env, tl, tl)
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DEF_HELPER_FLAGS_3(sdiv, TCG_CALL_NO_WG, i64, env, tl, tl)
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DEF_HELPER_3(taddcctv, tl, env, tl, tl)
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DEF_HELPER_3(tsubcctv, tl, env, tl, tl)
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#if !defined(CONFIG_USER_ONLY) && !defined(TARGET_SPARC64)
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DEF_HELPER_FLAGS_3(ld_code, TCG_CALL_NO_WG, i64, env, tl, i32)
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#endif
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#if !defined(CONFIG_USER_ONLY) || defined(TARGET_SPARC64)
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DEF_HELPER_FLAGS_4(ld_asi, TCG_CALL_NO_WG, i64, env, tl, int, i32)
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DEF_HELPER_FLAGS_5(st_asi, TCG_CALL_NO_WG, void, env, tl, i64, int, i32)
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@ -585,7 +585,6 @@ uint64_t helper_ld_asi(CPUSPARCState *env, target_ulong addr,
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#if defined(DEBUG_MXCC) || defined(DEBUG_ASI)
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uint32_t last_addr = addr;
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#endif
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MemOpIdx oi;
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do_check_align(env, addr, size - 1, GETPC());
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switch (asi) {
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@ -684,24 +683,6 @@ uint64_t helper_ld_asi(CPUSPARCState *env, target_ulong addr,
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case ASI_M_DIAGS: /* Turbosparc DTLB Diagnostic */
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case ASI_M_IODIAG: /* Turbosparc IOTLB Diagnostic */
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break;
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case ASI_KERNELTXT: /* Supervisor code access */
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oi = make_memop_idx(memop, cpu_mmu_index(env_cpu(env), true));
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switch (size) {
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case 1:
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ret = cpu_ldb_code_mmu(env, addr, oi, GETPC());
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break;
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case 2:
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ret = cpu_ldw_code_mmu(env, addr, oi, GETPC());
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break;
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default:
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case 4:
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ret = cpu_ldl_code_mmu(env, addr, oi, GETPC());
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break;
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case 8:
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ret = cpu_ldq_code_mmu(env, addr, oi, GETPC());
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break;
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}
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break;
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case ASI_M_TXTC_TAG: /* SparcStation 5 I-cache tag */
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case ASI_M_TXTC_DATA: /* SparcStation 5 I-cache data */
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case ASI_M_DATAC_TAG: /* SparcStation 5 D-cache tag */
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@ -779,7 +760,6 @@ uint64_t helper_ld_asi(CPUSPARCState *env, target_ulong addr,
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case 0x4c: /* SuperSPARC MMU Breakpoint Action */
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ret = env->mmubpaction;
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break;
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case ASI_USERTXT: /* User code access, XXX */
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default:
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sparc_raise_mmu_fault(cs, addr, false, false, asi, size, GETPC());
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ret = 0;
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@ -787,6 +767,8 @@ uint64_t helper_ld_asi(CPUSPARCState *env, target_ulong addr,
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case ASI_USERDATA: /* User data access */
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case ASI_KERNELDATA: /* Supervisor data access */
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case ASI_USERTXT: /* User code access */
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case ASI_KERNELTXT: /* Supervisor code access */
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case ASI_P: /* Implicit primary context data access (v9 only?) */
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case ASI_M_BYPASS: /* MMU passthrough */
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case ASI_LEON_BYPASS: /* LEON MMU passthrough */
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@ -1161,6 +1143,49 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr, uint64_t val,
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#endif
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}
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uint64_t helper_ld_code(CPUSPARCState *env, target_ulong addr, uint32_t oi)
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{
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MemOp mop = get_memop(oi);
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uintptr_t ra = GETPC();
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uint64_t ret;
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switch (mop & MO_SIZE) {
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case MO_8:
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ret = cpu_ldb_code_mmu(env, addr, oi, ra);
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if (mop & MO_SIGN) {
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ret = (int8_t)ret;
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}
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break;
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case MO_16:
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ret = cpu_ldw_code_mmu(env, addr, oi, ra);
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if ((mop & MO_BSWAP) != MO_TE) {
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ret = bswap16(ret);
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}
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if (mop & MO_SIGN) {
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ret = (int16_t)ret;
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}
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break;
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case MO_32:
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ret = cpu_ldl_code_mmu(env, addr, oi, ra);
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if ((mop & MO_BSWAP) != MO_TE) {
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ret = bswap32(ret);
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}
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if (mop & MO_SIGN) {
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ret = (int32_t)ret;
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}
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break;
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case MO_64:
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ret = cpu_ldq_code_mmu(env, addr, oi, ra);
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if ((mop & MO_BSWAP) != MO_TE) {
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ret = bswap64(ret);
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}
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break;
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default:
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g_assert_not_reached();
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}
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return ret;
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}
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#endif /* CONFIG_USER_ONLY */
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#else /* TARGET_SPARC64 */
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@ -1117,6 +1117,7 @@ typedef enum {
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GET_ASI_EXCP,
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GET_ASI_DIRECT,
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GET_ASI_DTWINX,
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GET_ASI_CODE,
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GET_ASI_BLOCK,
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GET_ASI_SHORT,
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GET_ASI_BCOPY,
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@ -1159,14 +1160,22 @@ static DisasASI resolve_asi(DisasContext *dc, int asi, MemOp memop)
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|| (asi == ASI_USERDATA
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&& (dc->def->features & CPU_FEATURE_CASA))) {
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switch (asi) {
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case ASI_USERDATA: /* User data access */
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case ASI_USERDATA: /* User data access */
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mem_idx = MMU_USER_IDX;
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type = GET_ASI_DIRECT;
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break;
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case ASI_KERNELDATA: /* Supervisor data access */
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case ASI_KERNELDATA: /* Supervisor data access */
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mem_idx = MMU_KERNEL_IDX;
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type = GET_ASI_DIRECT;
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break;
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case ASI_USERTXT: /* User text access */
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mem_idx = MMU_USER_IDX;
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type = GET_ASI_CODE;
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break;
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case ASI_KERNELTXT: /* Supervisor text access */
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mem_idx = MMU_KERNEL_IDX;
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type = GET_ASI_CODE;
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break;
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case ASI_M_BYPASS: /* MMU passthrough */
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case ASI_LEON_BYPASS: /* LEON MMU passthrough */
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mem_idx = MMU_PHYS_IDX;
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@ -1379,6 +1388,21 @@ static void gen_ld_asi(DisasContext *dc, DisasASI *da, TCGv dst, TCGv addr)
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case GET_ASI_DIRECT:
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tcg_gen_qemu_ld_tl(dst, addr, da->mem_idx, da->memop | MO_ALIGN);
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break;
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case GET_ASI_CODE:
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#if !defined(CONFIG_USER_ONLY) && !defined(TARGET_SPARC64)
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{
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MemOpIdx oi = make_memop_idx(da->memop, da->mem_idx);
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TCGv_i64 t64 = tcg_temp_new_i64();
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gen_helper_ld_code(t64, tcg_env, addr, tcg_constant_i32(oi));
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tcg_gen_trunc_i64_tl(dst, t64);
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}
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break;
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#else
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g_assert_not_reached();
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#endif
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default:
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{
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TCGv_i32 r_asi = tcg_constant_i32(da->asi);
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@ -1791,6 +1815,26 @@ static void gen_ldda_asi(DisasContext *dc, DisasASI *da, TCGv addr, int rd)
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}
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break;
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case GET_ASI_CODE:
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#if !defined(CONFIG_USER_ONLY) && !defined(TARGET_SPARC64)
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{
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MemOpIdx oi = make_memop_idx(da->memop, da->mem_idx);
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TCGv_i64 tmp = tcg_temp_new_i64();
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gen_helper_ld_code(tmp, tcg_env, addr, tcg_constant_i32(oi));
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/* See above. */
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if ((da->memop & MO_BSWAP) == MO_TE) {
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tcg_gen_extr_i64_tl(lo, hi, tmp);
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} else {
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tcg_gen_extr_i64_tl(hi, lo, tmp);
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}
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}
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break;
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#else
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g_assert_not_reached();
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#endif
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default:
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/* ??? In theory we've handled all of the ASIs that are valid
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for ldda, and this should raise DAE_invalid_asi. However,
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