target-s390: Convert LFPC, SFPC
Note that we were failing to set the rounding mode in fpu_status. Signed-off-by: Richard Henderson <rth@twiddle.net>
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102bf2c635
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@ -577,3 +577,20 @@ uint64_t HELPER(sqxb)(CPUS390XState *env, uint64_t ah, uint64_t al)
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handle_exceptions(env, GETPC());
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handle_exceptions(env, GETPC());
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return RET128(ret);
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return RET128(ret);
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}
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}
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/* set fpc */
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void HELPER(sfpc)(CPUS390XState *env, uint64_t fpc)
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{
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static const int rnd[4] = {
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float_round_nearest_even,
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float_round_to_zero,
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float_round_up,
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float_round_down
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};
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/* Install everything in the main FPC. */
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env->fpc = fpc;
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/* Install the rounding mode in the shadow fpu_status. */
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set_float_rounding_mode(rnd[fpc & 3], &env->fpu_status);
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}
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@ -78,6 +78,7 @@ DEF_HELPER_4(unpk, void, env, i32, i64, i64)
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DEF_HELPER_4(tr, void, env, i32, i64, i64)
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DEF_HELPER_4(tr, void, env, i32, i64, i64)
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DEF_HELPER_3(cksm, void, env, i32, i32)
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DEF_HELPER_3(cksm, void, env, i32, i32)
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DEF_HELPER_FLAGS_5(calc_cc, TCG_CALL_NO_RWG_SE, i32, env, i32, i64, i64, i64)
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DEF_HELPER_FLAGS_5(calc_cc, TCG_CALL_NO_RWG_SE, i32, env, i32, i64, i64, i64)
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DEF_HELPER_FLAGS_2(sfpc, TCG_CALL_NO_RWG, void, env, i64)
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#ifndef CONFIG_USER_ONLY
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#ifndef CONFIG_USER_ONLY
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DEF_HELPER_3(servc, i32, env, i32, i64)
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DEF_HELPER_3(servc, i32, env, i32, i64)
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@ -351,6 +351,9 @@
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C(0xb375, LZDR, RRE, Z, 0, 0, 0, f1, zero, 0)
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C(0xb375, LZDR, RRE, Z, 0, 0, 0, f1, zero, 0)
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C(0xb376, LZXR, RRE, Z, 0, 0, 0, x1, zero2, 0)
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C(0xb376, LZXR, RRE, Z, 0, 0, 0, x1, zero2, 0)
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/* LOAD FPC */
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C(0xb29d, LFPC, S, Z, 0, m2_32u, 0, 0, sfpc, 0)
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/* LOAD LENGTHENED */
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/* LOAD LENGTHENED */
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C(0xb304, LDEBR, RRE, Z, 0, e2, f1, 0, ldeb, 0)
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C(0xb304, LDEBR, RRE, Z, 0, e2, f1, 0, ldeb, 0)
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C(0xb305, LXDBR, RRE, Z, 0, f2_o, x1, 0, lxdb, 0)
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C(0xb305, LXDBR, RRE, Z, 0, f2_o, x1, 0, lxdb, 0)
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@ -455,6 +458,9 @@
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C(0xeb1d, RLL, RSY_a, Z, r3_o, sh32, new, r1_32, rll32, 0)
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C(0xeb1d, RLL, RSY_a, Z, r3_o, sh32, new, r1_32, rll32, 0)
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C(0xeb1c, RLLG, RSY_a, Z, r3_o, sh64, r1, 0, rll64, 0)
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C(0xeb1c, RLLG, RSY_a, Z, r3_o, sh64, r1, 0, rll64, 0)
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/* SET FPC */
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C(0xb384, SFPC, RRE, Z, 0, r1_o, 0, 0, sfpc, 0)
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/* SHIFT LEFT SINGLE */
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/* SHIFT LEFT SINGLE */
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D(0x8b00, SLA, RS_a, Z, r1, sh32, new, r1_32, sla, 0, 31)
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D(0x8b00, SLA, RS_a, Z, r1, sh32, new, r1_32, sla, 0, 31)
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D(0xebdd, SLAK, RSY_a, DO, r3, sh32, new, r1_32, sla, 0, 31)
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D(0xebdd, SLAK, RSY_a, DO, r3, sh32, new, r1_32, sla, 0, 31)
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@ -1337,18 +1337,6 @@ static void disas_b2(CPUS390XState *env, DisasContext *s, int op,
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tcg_temp_free_i32(tmp32_1);
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tcg_temp_free_i32(tmp32_1);
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tcg_temp_free_i32(tmp32_2);
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tcg_temp_free_i32(tmp32_2);
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break;
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break;
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case 0x9d: /* LFPC D2(B2) [S] */
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decode_rs(s, insn, &r1, &r3, &b2, &d2);
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tmp = get_address(s, 0, b2, d2);
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tmp2 = tcg_temp_new_i64();
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tmp32_1 = tcg_temp_new_i32();
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tcg_gen_qemu_ld32u(tmp2, tmp, get_mem_index(s));
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tcg_gen_trunc_i64_i32(tmp32_1, tmp2);
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tcg_gen_st_i32(tmp32_1, cpu_env, offsetof(CPUS390XState, fpc));
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tcg_temp_free_i64(tmp);
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tcg_temp_free_i64(tmp2);
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tcg_temp_free_i32(tmp32_1);
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break;
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case 0xb1: /* STFL D2(B2) [S] */
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case 0xb1: /* STFL D2(B2) [S] */
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/* Store Facility List (CPU features) at 200 */
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/* Store Facility List (CPU features) at 200 */
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check_privileged(s);
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check_privileged(s);
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@ -1394,47 +1382,11 @@ static void disas_b2(CPUS390XState *env, DisasContext *s, int op,
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}
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}
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}
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}
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static void disas_b3(CPUS390XState *env, DisasContext *s, int op, int m3,
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int r1, int r2)
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{
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TCGv_i32 tmp32_1;
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LOG_DISAS("disas_b3: op 0x%x m3 0x%x r1 %d r2 %d\n", op, m3, r1, r2);
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#define FP_HELPER(i) \
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tmp32_1 = tcg_const_i32(r1); \
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tmp32_2 = tcg_const_i32(r2); \
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gen_helper_ ## i(cpu_env, tmp32_1, tmp32_2); \
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tcg_temp_free_i32(tmp32_1); \
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tcg_temp_free_i32(tmp32_2);
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#define FP_HELPER_CC(i) \
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tmp32_1 = tcg_const_i32(r1); \
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tmp32_2 = tcg_const_i32(r2); \
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gen_helper_ ## i(cc_op, cpu_env, tmp32_1, tmp32_2); \
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set_cc_static(s); \
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tcg_temp_free_i32(tmp32_1); \
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tcg_temp_free_i32(tmp32_2);
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switch (op) {
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case 0x84: /* SFPC R1 [RRE] */
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tmp32_1 = load_reg32(r1);
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tcg_gen_st_i32(tmp32_1, cpu_env, offsetof(CPUS390XState, fpc));
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tcg_temp_free_i32(tmp32_1);
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break;
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default:
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LOG_DISAS("illegal b3 operation 0x%x\n", op);
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gen_illegal_opcode(s);
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break;
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}
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#undef FP_HELPER_CC
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#undef FP_HELPER
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}
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static void disas_s390_insn(CPUS390XState *env, DisasContext *s)
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static void disas_s390_insn(CPUS390XState *env, DisasContext *s)
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{
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{
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unsigned char opc;
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unsigned char opc;
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uint64_t insn;
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uint64_t insn;
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int op, r1, r2, r3;
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int op;
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opc = cpu_ldub_code(env, s->pc);
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opc = cpu_ldub_code(env, s->pc);
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LOG_DISAS("opc 0x%x\n", opc);
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LOG_DISAS("opc 0x%x\n", opc);
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@ -1445,14 +1397,6 @@ static void disas_s390_insn(CPUS390XState *env, DisasContext *s)
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op = (insn >> 16) & 0xff;
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op = (insn >> 16) & 0xff;
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disas_b2(env, s, op, insn);
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disas_b2(env, s, op, insn);
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break;
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break;
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case 0xb3:
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insn = ld_code4(env, s->pc);
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op = (insn >> 16) & 0xff;
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r3 = (insn >> 12) & 0xf; /* aka m3 */
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r1 = (insn >> 4) & 0xf;
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r2 = insn & 0xf;
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disas_b3(env, s, op, r3, r1, r2);
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break;
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default:
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default:
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qemu_log_mask(LOG_UNIMP, "unimplemented opcode 0x%x\n", opc);
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qemu_log_mask(LOG_UNIMP, "unimplemented opcode 0x%x\n", opc);
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gen_illegal_opcode(s);
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gen_illegal_opcode(s);
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@ -2981,6 +2925,12 @@ static ExitStatus op_srl(DisasContext *s, DisasOps *o)
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return NO_EXIT;
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return NO_EXIT;
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}
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}
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static ExitStatus op_sfpc(DisasContext *s, DisasOps *o)
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{
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gen_helper_sfpc(cpu_env, o->in2);
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return NO_EXIT;
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}
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#ifndef CONFIG_USER_ONLY
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#ifndef CONFIG_USER_ONLY
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static ExitStatus op_ssm(DisasContext *s, DisasOps *o)
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static ExitStatus op_ssm(DisasContext *s, DisasOps *o)
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{
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{
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