target/riscv: Adjust csr write mask with XLEN
Write mask is representing the bits we care about. Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20220120122050.41546-11-zhiwei_liu@c-sky.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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@ -924,7 +924,8 @@ static bool do_csrrw_i128(DisasContext *ctx, int rd, int rc,
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static bool trans_csrrw(DisasContext *ctx, arg_csrrw *a)
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{
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if (get_xl(ctx) < MXL_RV128) {
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RISCVMXL xl = get_xl(ctx);
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if (xl < MXL_RV128) {
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TCGv src = get_gpr(ctx, a->rs1, EXT_NONE);
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/*
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@ -935,7 +936,8 @@ static bool trans_csrrw(DisasContext *ctx, arg_csrrw *a)
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return do_csrw(ctx, a->csr, src);
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}
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TCGv mask = tcg_constant_tl(-1);
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TCGv mask = tcg_constant_tl(xl == MXL_RV32 ? UINT32_MAX :
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(target_ulong)-1);
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return do_csrrw(ctx, a->rd, a->csr, src, mask);
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} else {
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TCGv srcl = get_gpr(ctx, a->rs1, EXT_NONE);
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@ -1013,7 +1015,8 @@ static bool trans_csrrc(DisasContext *ctx, arg_csrrc *a)
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static bool trans_csrrwi(DisasContext *ctx, arg_csrrwi *a)
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{
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if (get_xl(ctx) < MXL_RV128) {
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RISCVMXL xl = get_xl(ctx);
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if (xl < MXL_RV128) {
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TCGv src = tcg_constant_tl(a->rs1);
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/*
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@ -1024,7 +1027,8 @@ static bool trans_csrrwi(DisasContext *ctx, arg_csrrwi *a)
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return do_csrw(ctx, a->csr, src);
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}
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TCGv mask = tcg_constant_tl(-1);
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TCGv mask = tcg_constant_tl(xl == MXL_RV32 ? UINT32_MAX :
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(target_ulong)-1);
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return do_csrrw(ctx, a->rd, a->csr, src, mask);
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} else {
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TCGv src = tcg_constant_tl(a->rs1);
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@ -50,7 +50,8 @@ target_ulong helper_csrr(CPURISCVState *env, int csr)
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void helper_csrw(CPURISCVState *env, int csr, target_ulong src)
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{
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RISCVException ret = riscv_csrrw(env, csr, NULL, src, -1);
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target_ulong mask = env->xl == MXL_RV32 ? UINT32_MAX : (target_ulong)-1;
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RISCVException ret = riscv_csrrw(env, csr, NULL, src, mask);
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if (ret != RISCV_EXCP_NONE) {
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riscv_raise_exception(env, ret, GETPC());
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