Hexagon (target/hexagon) Move pred_written to DisasContext
The pred_written variable in the CPUHexagonState is only used for bookkeeping within the translation of a packet. With recent changes that eliminate the need to free TCGv variables, these make more sense to be transient and kept in DisasContext. Suggested-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20230427230012.3800327-20-tsimpson@quicinc.com>
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@ -98,8 +98,6 @@ typedef struct CPUArchState {
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target_ulong this_PC;
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target_ulong reg_written[TOTAL_PER_THREAD_REGS];
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target_ulong pred_written;
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MemLog mem_log_stores[STORES_MAX];
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target_ulong pkt_has_store_s1;
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target_ulong dczero_addr;
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@ -151,7 +151,7 @@ void gen_log_pred_write(DisasContext *ctx, int pnum, TCGv val)
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tcg_gen_and_tl(pred, pred, base_val);
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}
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if (HEX_DEBUG) {
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tcg_gen_ori_tl(hex_pred_written, hex_pred_written, 1 << pnum);
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tcg_gen_ori_tl(ctx->pred_written, ctx->pred_written, 1 << pnum);
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}
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set_bit(pnum, ctx->pregs_written);
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}
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@ -21,7 +21,7 @@
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DEF_HELPER_FLAGS_2(raise_exception, TCG_CALL_NO_RETURN, noreturn, env, i32)
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DEF_HELPER_1(debug_start_packet, void, env)
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DEF_HELPER_FLAGS_3(debug_check_store_width, TCG_CALL_NO_WG, void, env, int, int)
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DEF_HELPER_FLAGS_3(debug_commit_end, TCG_CALL_NO_WG, void, env, int, int)
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DEF_HELPER_FLAGS_4(debug_commit_end, TCG_CALL_NO_WG, void, env, int, int, int)
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DEF_HELPER_2(commit_store, void, env, int)
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DEF_HELPER_3(gather_store, void, env, i32, int)
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DEF_HELPER_1(commit_hvx_stores, void, env)
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@ -203,7 +203,8 @@ static void print_store(CPUHexagonState *env, int slot)
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}
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/* This function is a handy place to set a breakpoint */
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void HELPER(debug_commit_end)(CPUHexagonState *env, int has_st0, int has_st1)
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void HELPER(debug_commit_end)(CPUHexagonState *env,
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int pred_written, int has_st0, int has_st1)
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{
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bool reg_printed = false;
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bool pred_printed = false;
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@ -225,7 +226,7 @@ void HELPER(debug_commit_end)(CPUHexagonState *env, int has_st0, int has_st1)
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}
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for (i = 0; i < NUM_PREGS; i++) {
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if (env->pred_written & (1 << i)) {
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if (pred_written & (1 << i)) {
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if (!pred_printed) {
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HEX_DEBUG_LOG("Predicates written\n");
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pred_printed = true;
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@ -46,7 +46,6 @@ TCGv hex_slot_cancelled;
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TCGv hex_branch_taken;
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TCGv hex_new_value_usr;
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TCGv hex_reg_written[TOTAL_PER_THREAD_REGS];
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TCGv hex_pred_written;
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TCGv hex_store_addr[STORES_MAX];
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TCGv hex_store_width[STORES_MAX];
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TCGv hex_store_val32[STORES_MAX];
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@ -549,7 +548,8 @@ static void gen_start_packet(DisasContext *ctx)
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}
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}
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if (HEX_DEBUG) {
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tcg_gen_movi_tl(hex_pred_written, 0);
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ctx->pred_written = tcg_temp_new();
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tcg_gen_movi_tl(ctx->pred_written, 0);
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}
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/* Preload the predicated registers into get_result_gpr(ctx, i) */
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@ -1007,7 +1007,8 @@ static void gen_commit_packet(DisasContext *ctx)
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tcg_constant_tl(pkt->pkt_has_store_s1 && !pkt->pkt_has_dczeroa);
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/* Handy place to set a breakpoint at the end of execution */
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gen_helper_debug_commit_end(cpu_env, has_st0, has_st1);
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gen_helper_debug_commit_end(cpu_env, ctx->pred_written,
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has_st0, has_st1);
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}
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if (pkt->vhist_insn != NULL) {
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@ -1200,8 +1201,6 @@ void hexagon_translate_init(void)
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offsetof(CPUHexagonState, pred[i]),
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hexagon_prednames[i]);
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}
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hex_pred_written = tcg_global_mem_new(cpu_env,
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offsetof(CPUHexagonState, pred_written), "pred_written");
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hex_this_PC = tcg_global_mem_new(cpu_env,
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offsetof(CPUHexagonState, this_PC), "this_PC");
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hex_slot_cancelled = tcg_global_mem_new(cpu_env,
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@ -71,6 +71,7 @@ typedef struct DisasContext {
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bool has_hvx_helper;
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TCGv new_value[TOTAL_PER_THREAD_REGS];
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TCGv new_pred_value[NUM_PREGS];
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TCGv pred_written;
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} DisasContext;
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static inline void ctx_log_pred_write(DisasContext *ctx, int pnum)
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@ -194,7 +195,6 @@ extern TCGv hex_slot_cancelled;
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extern TCGv hex_branch_taken;
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extern TCGv hex_new_value_usr;
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extern TCGv hex_reg_written[TOTAL_PER_THREAD_REGS];
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extern TCGv hex_pred_written;
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extern TCGv hex_store_addr[STORES_MAX];
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extern TCGv hex_store_width[STORES_MAX];
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extern TCGv hex_store_val32[STORES_MAX];
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