hw: allwinner-i2c: Fix TWI_CNTR_INT_FLAG on SUN6i SoCs
TWI_CNTR_INT_FLAG is W1C(write 1 to clear and write 0 has non-effect) register on SUN6i based SoCs, we should lower interrupt when the guest set this bit. The linux kernel will hang in irq handler(mv64xxx_i2c_intr) if no device connected on the i2c bus, next is the trace log: allwinner_i2c_write write CNTR(0x0c): 0xc4 A_ACK BUS_EN INT_EN allwinner_i2c_write write CNTR(0x0c): 0xcc A_ACK INT_FLAG BUS_EN INT_EN allwinner_i2c_read read CNTR(0x0c): 0xcc A_ACK INT_FLAG BUS_EN INT_EN allwinner_i2c_read read STAT(0x10): 0x20 STAT_M_ADDR_WR_NACK allwinner_i2c_write write CNTR(0x0c): 0x54 A_ACK M_STP BUS_EN allwinner_i2c_write write CNTR(0x0c): 0x4c A_ACK INT_FLAG BUS_EN allwinner_i2c_read read CNTR(0x0c): 0x4c A_ACK INT_FLAG BUS_EN allwinner_i2c_read read STAT(0x10): 0xf8 STAT_IDLE allwinner_i2c_write write CNTR(0x0c): 0x54 A_ACK M_STP BUS_EN allwinner_i2c_write write CNTR(0x0c): 0x4c A_ACK INT_FLAG BUS_EN allwinner_i2c_read read CNTR(0x0c): 0x4c A_ACK INT_FLAG BUS_EN allwinner_i2c_read read STAT(0x10): 0xf8 STAT_IDLE ... Fix it. Signed-off-by: qianfan Zhao <qianfanguijin@163.com> Reviewed-by: Strahinja Jankovic <strahinja.p.jankovic@gmail.com> Tested-by: Strahinja Jankovic <strahinja.p.jankovic@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -357,10 +357,16 @@ static void allwinner_i2c_write(void *opaque, hwaddr offset,
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s->stat = STAT_FROM_STA(STAT_IDLE);
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s->stat = STAT_FROM_STA(STAT_IDLE);
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s->cntr &= ~TWI_CNTR_M_STP;
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s->cntr &= ~TWI_CNTR_M_STP;
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}
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}
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if ((s->cntr & TWI_CNTR_INT_FLAG) == 0) {
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/* Interrupt flag cleared */
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if (!s->irq_clear_inverted && !(s->cntr & TWI_CNTR_INT_FLAG)) {
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/* Write 0 to clear this flag */
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qemu_irq_lower(s->irq);
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} else if (s->irq_clear_inverted && (s->cntr & TWI_CNTR_INT_FLAG)) {
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/* Write 1 to clear this flag */
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s->cntr &= ~TWI_CNTR_INT_FLAG;
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qemu_irq_lower(s->irq);
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qemu_irq_lower(s->irq);
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}
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}
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if ((s->cntr & TWI_CNTR_A_ACK) == 0) {
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if ((s->cntr & TWI_CNTR_A_ACK) == 0) {
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if (STAT_TO_STA(s->stat) == STAT_M_DATA_RX_ACK) {
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if (STAT_TO_STA(s->stat) == STAT_M_DATA_RX_ACK) {
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s->stat = STAT_FROM_STA(STAT_M_DATA_RX_NACK);
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s->stat = STAT_FROM_STA(STAT_M_DATA_RX_NACK);
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@ -451,9 +457,25 @@ static const TypeInfo allwinner_i2c_type_info = {
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.class_init = allwinner_i2c_class_init,
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.class_init = allwinner_i2c_class_init,
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};
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};
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static void allwinner_i2c_sun6i_init(Object *obj)
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{
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AWI2CState *s = AW_I2C(obj);
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s->irq_clear_inverted = true;
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}
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static const TypeInfo allwinner_i2c_sun6i_type_info = {
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.name = TYPE_AW_I2C_SUN6I,
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.parent = TYPE_SYS_BUS_DEVICE,
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.instance_size = sizeof(AWI2CState),
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.instance_init = allwinner_i2c_sun6i_init,
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.class_init = allwinner_i2c_class_init,
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};
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static void allwinner_i2c_register_types(void)
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static void allwinner_i2c_register_types(void)
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{
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{
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type_register_static(&allwinner_i2c_type_info);
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type_register_static(&allwinner_i2c_type_info);
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type_register_static(&allwinner_i2c_sun6i_type_info);
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}
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}
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type_init(allwinner_i2c_register_types)
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type_init(allwinner_i2c_register_types)
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@ -28,6 +28,10 @@
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#include "qom/object.h"
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#include "qom/object.h"
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#define TYPE_AW_I2C "allwinner.i2c"
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#define TYPE_AW_I2C "allwinner.i2c"
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/** Allwinner I2C sun6i family and newer (A31, H2+, H3, etc) */
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#define TYPE_AW_I2C_SUN6I TYPE_AW_I2C "-sun6i"
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OBJECT_DECLARE_SIMPLE_TYPE(AWI2CState, AW_I2C)
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OBJECT_DECLARE_SIMPLE_TYPE(AWI2CState, AW_I2C)
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#define AW_I2C_MEM_SIZE 0x24
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#define AW_I2C_MEM_SIZE 0x24
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@ -50,6 +54,8 @@ struct AWI2CState {
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uint8_t srst;
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uint8_t srst;
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uint8_t efr;
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uint8_t efr;
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uint8_t lcr;
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uint8_t lcr;
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bool irq_clear_inverted;
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};
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};
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#endif /* ALLWINNER_I2C_H */
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#endif /* ALLWINNER_I2C_H */
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