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target/arm: Replace ARM_FEATURE_VFP3 checks with fp{sp, dp}_v3 

Sort this check to the start of a trans_* function.
Merge this with any existing test for fpdp_v2.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200224222232.13807-8-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Richard Henderson 2020-02-24 14:22:22 -08:00 committed by Peter Maydell
parent 799449abda
commit 84774cc37f
1 changed files with 8 additions and 16 deletions
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24
target/arm/translate-vfp.inc.c
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@ -717,7 +717,7 @@ static bool trans_VMSR_VMRS(DisasContext *s, arg_VMSR_VMRS *a)
* VFPv2 allows access to FPSID from userspace; VFPv3 restricts
* all ID registers to privileged access only.
*/
if (IS_USER(s) && arm_dc_feature(s, ARM_FEATURE_VFP3)) {
if (IS_USER(s) && dc_isar_feature(aa32_fpsp_v3, s)) {
return false;
}
ignore_vfp_enabled = true;
@ -746,7 +746,7 @@ static bool trans_VMSR_VMRS(DisasContext *s, arg_VMSR_VMRS *a)
case ARM_VFP_FPINST:
case ARM_VFP_FPINST2:
/* Not present in VFPv3 */
if (IS_USER(s) || arm_dc_feature(s, ARM_FEATURE_VFP3)) {
if (IS_USER(s) || dc_isar_feature(aa32_fpsp_v3, s)) {
return false;
}
break;
@ -1873,12 +1873,12 @@ static bool trans_VMOV_imm_sp(DisasContext *s, arg_VMOV_imm_sp *a)
vd = a->vd;
if (!dc_isar_feature(aa32_fpshvec, s) &&
(veclen != 0 || s->vec_stride != 0)) {
if (!dc_isar_feature(aa32_fpsp_v3, s)) {
return false;
}
if (!arm_dc_feature(s, ARM_FEATURE_VFP3)) {
if (!dc_isar_feature(aa32_fpshvec, s) &&
(veclen != 0 || s->vec_stride != 0)) {
return false;
}
@ -1923,7 +1923,7 @@ static bool trans_VMOV_imm_dp(DisasContext *s, arg_VMOV_imm_dp *a)
vd = a->vd;
if (!dc_isar_feature(aa32_fpdp_v2, s)) {
if (!dc_isar_feature(aa32_fpdp_v3, s)) {
return false;
}
@ -1937,10 +1937,6 @@ static bool trans_VMOV_imm_dp(DisasContext *s, arg_VMOV_imm_dp *a)
return false;
}
if (!arm_dc_feature(s, ARM_FEATURE_VFP3)) {
return false;
}
if (!vfp_access_check(s)) {
return true;
}
@ -2565,7 +2561,7 @@ static bool trans_VCVT_fix_sp(DisasContext *s, arg_VCVT_fix_sp *a)
TCGv_ptr fpst;
int frac_bits;
if (!arm_dc_feature(s, ARM_FEATURE_VFP3)) {
if (!dc_isar_feature(aa32_fpsp_v3, s)) {
return false;
}
@ -2625,11 +2621,7 @@ static bool trans_VCVT_fix_dp(DisasContext *s, arg_VCVT_fix_dp *a)
TCGv_ptr fpst;
int frac_bits;
if (!dc_isar_feature(aa32_fpdp_v2, s)) {
return false;
}
if (!arm_dc_feature(s, ARM_FEATURE_VFP3)) {
if (!dc_isar_feature(aa32_fpdp_v3, s)) {
return false;
}