target/riscv: Fix the interrupt cause code
Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 85b7fdba8abd87adb83275cdc3043ce35a1ed5c3.1597259519.git.alistair.francis@wdc.com Message-Id: <85b7fdba8abd87adb83275cdc3043ce35a1ed5c3.1597259519.git.alistair.francis@wdc.com>
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@ -916,14 +916,15 @@ void riscv_cpu_do_interrupt(CPUState *cs)
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if (riscv_cpu_virt_enabled(env) && ((hdeleg >> cause) & 1) &&
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if (riscv_cpu_virt_enabled(env) && ((hdeleg >> cause) & 1) &&
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!force_hs_execp) {
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!force_hs_execp) {
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/* Trap to VS mode */
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/*
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/*
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* See if we need to adjust cause. Yes if its VS mode interrupt
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* See if we need to adjust cause. Yes if its VS mode interrupt
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* no if hypervisor has delegated one of hs mode's interrupt
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* no if hypervisor has delegated one of hs mode's interrupt
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*/
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*/
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if (cause == IRQ_VS_TIMER || cause == IRQ_VS_SOFT ||
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if (cause == IRQ_VS_TIMER || cause == IRQ_VS_SOFT ||
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cause == IRQ_VS_EXT)
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cause == IRQ_VS_EXT) {
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cause = cause - 1;
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cause = cause - 1;
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/* Trap to VS mode */
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}
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env->hstatus = set_field(env->hstatus, HSTATUS_GVA, 0);
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env->hstatus = set_field(env->hstatus, HSTATUS_GVA, 0);
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} else if (riscv_cpu_virt_enabled(env)) {
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} else if (riscv_cpu_virt_enabled(env)) {
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/* Trap into HS mode, from virt */
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/* Trap into HS mode, from virt */
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