From e1a0433956bbe68b56853e6ae633a5004b1f6351 Mon Sep 17 00:00:00 2001 From: Eduardo Habkost Date: Wed, 8 Apr 2015 08:34:56 -0300 Subject: [PATCH 1/6] MAINTAINERS: Add myself to X86 Acked-by: Paolo Bonzini Signed-off-by: Eduardo Habkost --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index d7e9ba2da7..7db4c003da 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -172,6 +172,7 @@ F: hw/unicore32/ X86 M: Paolo Bonzini M: Richard Henderson +M: Eduardo Habkost S: Odd Fixes F: target-i386/ F: hw/i386/ From b203a4ba93fc25bf1eb49039a8ec4b260b446211 Mon Sep 17 00:00:00 2001 From: Eduardo Habkost Date: Wed, 8 Apr 2015 08:36:24 -0300 Subject: [PATCH 2/6] MAINTAINERS: Change status of X86 to Maintained "Odd Fixes" doesn't reflect the current status of target-i386. We have people looking after it, now. Acked-by: Paolo Bonzini Signed-off-by: Eduardo Habkost --- MAINTAINERS | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/MAINTAINERS b/MAINTAINERS index 7db4c003da..f714a984c6 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -173,7 +173,7 @@ X86 M: Paolo Bonzini M: Richard Henderson M: Eduardo Habkost -S: Odd Fixes +S: Maintained F: target-i386/ F: hw/i386/ From d9f7e29ee5a6915caa049ba64c0a9f28766351d2 Mon Sep 17 00:00:00 2001 From: Eduardo Habkost Date: Wed, 8 Apr 2015 14:57:31 -0300 Subject: [PATCH 3/6] qemu-config: Accept empty option values Currently it is impossible to set an option in a config file to an empty string, because the parser matches only lines containing non-empty strings between double-quotes. As sscanf() "[" conversion specifier only matches non-empty strings, add a special case for empty strings. Reviewed-by: Eric Blake Acked-by: Paolo Bonzini Signed-off-by: Eduardo Habkost --- util/qemu-config.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/util/qemu-config.c b/util/qemu-config.c index 2d32ce7e91..a393a3d785 100644 --- a/util/qemu-config.c +++ b/util/qemu-config.c @@ -413,7 +413,9 @@ int qemu_config_parse(FILE *fp, QemuOptsList **lists, const char *fname) opts = qemu_opts_create(list, NULL, 0, &error_abort); continue; } - if (sscanf(line, " %63s = \"%1023[^\"]\"", arg, value) == 2) { + value[0] = '\0'; + if (sscanf(line, " %63s = \"%1023[^\"]\"", arg, value) == 2 || + sscanf(line, " %63s = \"\"", arg) == 1) { /* arg = value */ if (opts == NULL) { error_report("no group defined"); From b9472b76d273c7796d877c49af50969c0a879c50 Mon Sep 17 00:00:00 2001 From: Eduardo Habkost Date: Thu, 2 Apr 2015 17:21:53 -0300 Subject: [PATCH 4/6] target-i386: Make "level" and "xlevel" properties static Static properties require only 1 line of code, much simpler than the existing code that requires writing new getters/setters. As a nice side-effect, this fixes an existing bug where the setters were incorrectly allowing the properties to be changed after the CPU was already realized. Reviewed-by: Igor Mammedov Signed-off-by: Eduardo Habkost --- target-i386/cpu.c | 40 ++-------------------------------------- 1 file changed, 2 insertions(+), 38 deletions(-) diff --git a/target-i386/cpu.c b/target-i386/cpu.c index 03b33cf3bd..2bbf01df92 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -1618,38 +1618,6 @@ static void x86_cpuid_version_set_stepping(Object *obj, Visitor *v, env->cpuid_version |= value & 0xf; } -static void x86_cpuid_get_level(Object *obj, Visitor *v, void *opaque, - const char *name, Error **errp) -{ - X86CPU *cpu = X86_CPU(obj); - - visit_type_uint32(v, &cpu->env.cpuid_level, name, errp); -} - -static void x86_cpuid_set_level(Object *obj, Visitor *v, void *opaque, - const char *name, Error **errp) -{ - X86CPU *cpu = X86_CPU(obj); - - visit_type_uint32(v, &cpu->env.cpuid_level, name, errp); -} - -static void x86_cpuid_get_xlevel(Object *obj, Visitor *v, void *opaque, - const char *name, Error **errp) -{ - X86CPU *cpu = X86_CPU(obj); - - visit_type_uint32(v, &cpu->env.cpuid_xlevel, name, errp); -} - -static void x86_cpuid_set_xlevel(Object *obj, Visitor *v, void *opaque, - const char *name, Error **errp) -{ - X86CPU *cpu = X86_CPU(obj); - - visit_type_uint32(v, &cpu->env.cpuid_xlevel, name, errp); -} - static char *x86_cpuid_get_vendor(Object *obj, Error **errp) { X86CPU *cpu = X86_CPU(obj); @@ -2900,12 +2868,6 @@ static void x86_cpu_initfn(Object *obj) object_property_add(obj, "stepping", "int", x86_cpuid_version_get_stepping, x86_cpuid_version_set_stepping, NULL, NULL, NULL); - object_property_add(obj, "level", "int", - x86_cpuid_get_level, - x86_cpuid_set_level, NULL, NULL, NULL); - object_property_add(obj, "xlevel", "int", - x86_cpuid_get_xlevel, - x86_cpuid_set_xlevel, NULL, NULL, NULL); object_property_add_str(obj, "vendor", x86_cpuid_get_vendor, x86_cpuid_set_vendor, NULL); @@ -2998,6 +2960,8 @@ static Property x86_cpu_properties[] = { DEFINE_PROP_BOOL("check", X86CPU, check_cpuid, false), DEFINE_PROP_BOOL("enforce", X86CPU, enforce_cpuid, false), DEFINE_PROP_BOOL("kvm", X86CPU, expose_kvm, true), + DEFINE_PROP_UINT32("level", X86CPU, env.cpuid_level, 0), + DEFINE_PROP_UINT32("xlevel", X86CPU, env.cpuid_xlevel, 0), DEFINE_PROP_END_OF_LIST() }; From 01431f3ce0f31e123172cc99c12c98c0ddbe9917 Mon Sep 17 00:00:00 2001 From: Eduardo Habkost Date: Thu, 2 Apr 2015 17:22:27 -0300 Subject: [PATCH 5/6] target-i386: X86CPU::xlevel2 QOM property We already have "level" and "xlevel", only "xlevel2" is missing. Reviewed-by: Paolo Bonzini Signed-off-by: Eduardo Habkost --- target-i386/cpu.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/target-i386/cpu.c b/target-i386/cpu.c index 2bbf01df92..e657f10d97 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -2077,7 +2077,7 @@ static void x86_cpu_load_def(X86CPU *cpu, X86CPUDefinition *def, Error **errp) object_property_set_int(OBJECT(cpu), def->model, "model", errp); object_property_set_int(OBJECT(cpu), def->stepping, "stepping", errp); object_property_set_int(OBJECT(cpu), def->xlevel, "xlevel", errp); - env->cpuid_xlevel2 = def->xlevel2; + object_property_set_int(OBJECT(cpu), def->xlevel2, "xlevel2", errp); cpu->cache_info_passthrough = def->cache_info_passthrough; object_property_set_str(OBJECT(cpu), def->model_id, "model-id", errp); for (w = 0; w < FEATURE_WORDS; w++) { @@ -2962,6 +2962,7 @@ static Property x86_cpu_properties[] = { DEFINE_PROP_BOOL("kvm", X86CPU, expose_kvm, true), DEFINE_PROP_UINT32("level", X86CPU, env.cpuid_level, 0), DEFINE_PROP_UINT32("xlevel", X86CPU, env.cpuid_xlevel, 0), + DEFINE_PROP_UINT32("xlevel2", X86CPU, env.cpuid_xlevel2, 0), DEFINE_PROP_END_OF_LIST() }; From 726a8ff68677d8d5fba17eb0ffb85076bfb598dc Mon Sep 17 00:00:00 2001 From: Eduardo Habkost Date: Fri, 10 Apr 2015 14:45:00 -0300 Subject: [PATCH 6/6] target-i386: Remove AMD feature flag aliases from CPU model table When CPU vendor is AMD, the AMD feature alias bits on CPUID[0x80000001].EDX are already automatically copied from CPUID[1].EDX on x86_cpu_realizefn(). When CPU vendor is Intel, those bits are reserved and should be zero. On either case, those bits shouldn't be set in the CPU model table. Reviewed-by: Igor Mammedov Signed-off-by: Eduardo Habkost --- target-i386/cpu.c | 7 ------- 1 file changed, 7 deletions(-) diff --git a/target-i386/cpu.c b/target-i386/cpu.c index e657f10d97..3305e09413 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -688,7 +688,6 @@ static X86CPUDefinition builtin_x86_defs[] = { .features[FEAT_1_ECX] = CPUID_EXT_SSE3 | CPUID_EXT_CX16 | CPUID_EXT_POPCNT, .features[FEAT_8000_0001_EDX] = - (PPRO_FEATURES & CPUID_EXT2_AMD_ALIASES) | CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX, .features[FEAT_8000_0001_ECX] = CPUID_EXT3_LAHF_LM | CPUID_EXT3_SVM | @@ -711,7 +710,6 @@ static X86CPUDefinition builtin_x86_defs[] = { CPUID_EXT_SSE3 | CPUID_EXT_MONITOR | CPUID_EXT_CX16 | CPUID_EXT_POPCNT, .features[FEAT_8000_0001_EDX] = - (PPRO_FEATURES & CPUID_EXT2_AMD_ALIASES) | CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX | CPUID_EXT2_3DNOW | CPUID_EXT2_3DNOWEXT | CPUID_EXT2_MMXEXT | CPUID_EXT2_FFXSR | CPUID_EXT2_PDPE1GB | CPUID_EXT2_RDTSCP, @@ -769,7 +767,6 @@ static X86CPUDefinition builtin_x86_defs[] = { CPUID_EXT_SSE3 | CPUID_EXT_CX16, /* Missing: CPUID_EXT2_PDPE1GB, CPUID_EXT2_RDTSCP */ .features[FEAT_8000_0001_EDX] = - (PPRO_FEATURES & CPUID_EXT2_AMD_ALIASES) | CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX, /* Missing: CPUID_EXT3_LAHF_LM, CPUID_EXT3_CMP_LEG, CPUID_EXT3_EXTAPIC, CPUID_EXT3_CR8LEG, CPUID_EXT3_ABM, CPUID_EXT3_SSE4A, @@ -805,8 +802,6 @@ static X86CPUDefinition builtin_x86_defs[] = { CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA | CPUID_PSE36, .features[FEAT_1_ECX] = CPUID_EXT_SSE3, - .features[FEAT_8000_0001_EDX] = - PPRO_FEATURES & CPUID_EXT2_AMD_ALIASES, .features[FEAT_8000_0001_ECX] = 0, .xlevel = 0x80000008, @@ -888,7 +883,6 @@ static X86CPUDefinition builtin_x86_defs[] = { PPRO_FEATURES | CPUID_PSE36 | CPUID_VME | CPUID_MTRR | CPUID_MCA, .features[FEAT_8000_0001_EDX] = - (PPRO_FEATURES & CPUID_EXT2_AMD_ALIASES) | CPUID_EXT2_MMXEXT | CPUID_EXT2_3DNOW | CPUID_EXT2_3DNOWEXT, .xlevel = 0x80000008, }, @@ -912,7 +906,6 @@ static X86CPUDefinition builtin_x86_defs[] = { CPUID_EXT_SSE3 | CPUID_EXT_MONITOR | CPUID_EXT_SSSE3 | CPUID_EXT_MOVBE, .features[FEAT_8000_0001_EDX] = - (PPRO_FEATURES & CPUID_EXT2_AMD_ALIASES) | CPUID_EXT2_NX, .features[FEAT_8000_0001_ECX] = CPUID_EXT3_LAHF_LM,