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pull-loongarch-20240322

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Merge tag 'pull-loongarch-20240322' of https://gitlab.com/gaosong/qemu into staging

pull-loongarch-20240322

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* tag 'pull-loongarch-20240322' of https://gitlab.com/gaosong/qemu:
  target/loongarch: Fix qemu-system-loongarch64 assert failed with the option '-d int'

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell 2024-03-22 10:59:57 +00:00
commit 853546f812
1 changed files with 40 additions and 34 deletions
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74
target/loongarch/cpu.c
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@ -45,33 +45,45 @@ const char * const fregnames[32] = {
"f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
};
static const char * const excp_names[] = {
[EXCCODE_INT] = "Interrupt",
[EXCCODE_PIL] = "Page invalid exception for load",
[EXCCODE_PIS] = "Page invalid exception for store",
[EXCCODE_PIF] = "Page invalid exception for fetch",
[EXCCODE_PME] = "Page modified exception",
[EXCCODE_PNR] = "Page Not Readable exception",
[EXCCODE_PNX] = "Page Not Executable exception",
[EXCCODE_PPI] = "Page Privilege error",
[EXCCODE_ADEF] = "Address error for instruction fetch",
[EXCCODE_ADEM] = "Address error for Memory access",
[EXCCODE_SYS] = "Syscall",
[EXCCODE_BRK] = "Break",
[EXCCODE_INE] = "Instruction Non-Existent",
[EXCCODE_IPE] = "Instruction privilege error",
[EXCCODE_FPD] = "Floating Point Disabled",
[EXCCODE_FPE] = "Floating Point Exception",
[EXCCODE_DBP] = "Debug breakpoint",
[EXCCODE_BCE] = "Bound Check Exception",
[EXCCODE_SXD] = "128 bit vector instructions Disable exception",
[EXCCODE_ASXD] = "256 bit vector instructions Disable exception",
struct TypeExcp {
int32_t exccode;
const char * const name;
};
static const struct TypeExcp excp_names[] = {
{EXCCODE_INT, "Interrupt"},
{EXCCODE_PIL, "Page invalid exception for load"},
{EXCCODE_PIS, "Page invalid exception for store"},
{EXCCODE_PIF, "Page invalid exception for fetch"},
{EXCCODE_PME, "Page modified exception"},
{EXCCODE_PNR, "Page Not Readable exception"},
{EXCCODE_PNX, "Page Not Executable exception"},
{EXCCODE_PPI, "Page Privilege error"},
{EXCCODE_ADEF, "Address error for instruction fetch"},
{EXCCODE_ADEM, "Address error for Memory access"},
{EXCCODE_SYS, "Syscall"},
{EXCCODE_BRK, "Break"},
{EXCCODE_INE, "Instruction Non-Existent"},
{EXCCODE_IPE, "Instruction privilege error"},
{EXCCODE_FPD, "Floating Point Disabled"},
{EXCCODE_FPE, "Floating Point Exception"},
{EXCCODE_DBP, "Debug breakpoint"},
{EXCCODE_BCE, "Bound Check Exception"},
{EXCCODE_SXD, "128 bit vector instructions Disable exception"},
{EXCCODE_ASXD, "256 bit vector instructions Disable exception"},
{EXCP_HLT, "EXCP_HLT"},
};
const char *loongarch_exception_name(int32_t exception)
{
assert(excp_names[exception]);
return excp_names[exception];
int i;
for (i = 0; i < ARRAY_SIZE(excp_names); i++) {
if (excp_names[i].exccode == exception) {
return excp_names[i].name;
}
}
return "Unknown";
}
void G_NORETURN do_raise_exception(CPULoongArchState *env,
@ -80,7 +92,7 @@ void G_NORETURN do_raise_exception(CPULoongArchState *env,
{
CPUState *cs = env_cpu(env);
qemu_log_mask(CPU_LOG_INT, "%s: %d (%s)\n",
qemu_log_mask(CPU_LOG_INT, "%s: expection: %d (%s)\n",
__func__,
exception,
loongarch_exception_name(exception));
@ -154,22 +166,16 @@ static void loongarch_cpu_do_interrupt(CPUState *cs)
CPULoongArchState *env = cpu_env(cs);
bool update_badinstr = 1;
int cause = -1;
const char *name;
bool tlbfill = FIELD_EX64(env->CSR_TLBRERA, CSR_TLBRERA, ISTLBR);
uint32_t vec_size = FIELD_EX64(env->CSR_ECFG, CSR_ECFG, VS);
if (cs->exception_index != EXCCODE_INT) {
if (cs->exception_index < 0 ||
cs->exception_index >= ARRAY_SIZE(excp_names)) {
name = "unknown";
} else {
name = excp_names[cs->exception_index];
}
qemu_log_mask(CPU_LOG_INT,
"%s enter: pc " TARGET_FMT_lx " ERA " TARGET_FMT_lx
" TLBRERA " TARGET_FMT_lx " %s exception\n", __func__,
env->pc, env->CSR_ERA, env->CSR_TLBRERA, name);
" TLBRERA " TARGET_FMT_lx " exception: %d (%s)\n",
__func__, env->pc, env->CSR_ERA, env->CSR_TLBRERA,
cs->exception_index,
loongarch_exception_name(cs->exception_index));
}
switch (cs->exception_index) {