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target/mips: Fix store adress of high 64bit in helper_msa_st_b() 

This patch fix the issue that helper_msa_st_b() write high 64bit
data to where the low 64bit resides, leaving high 64bit undefined.

Fixes: 68ad9260e0 ("target/mips: Use 8-byte memory ops for msa load/store")
Signed-off-by: Ni Hui <shuizhuyuanluo@126.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220504023319.12923-1-shuizhuyuanluo@126.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
This commit is contained in:
Ni Hui 2022-05-04 10:33:19 +08:00 committed by Philippe Mathieu-Daudé
parent ead0bf0d33
commit 857816a42b
1 changed files with 1 additions and 1 deletions
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target/mips/tcg/msa_helper.c
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@ -8329,7 +8329,7 @@ void helper_msa_st_b(CPUMIPSState *env, uint32_t wd,
/* Store 8 bytes at a time. Vector element ordering makes this LE. */
cpu_stq_le_data_ra(env, addr + 0, pwd->d[0], ra);
cpu_stq_le_data_ra(env, addr + 0, pwd->d[1], ra);
cpu_stq_le_data_ra(env, addr + 8, pwd->d[1], ra);
}
void helper_msa_st_h(CPUMIPSState *env, uint32_t wd,