target/riscv: Clear CSR values at reset and sync MPSTATE with host
This patch fixes guest reboot errors when using KVM. There are two issues when rebooting a guest using KVM 1. When the guest initiates a reboot the host is unable to stop the vcpu 2. When running a SMP guest the qemu monitor system_reset causes a vcpu crash This can be fixed by clearing the CSR values at reset and syncing the MPSTATE with the host. Signed-off-by: liguang.zhang <liguang.zhang@hexintek.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20230913091332.17355-1-18622748025@163.com> [ Changes by AF - Fixup commit message - Fixup patch style ] Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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@ -51,6 +51,8 @@ void riscv_kvm_aplic_request(void *opaque, int irq, int level)
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kvm_set_irq(kvm_state, irq, !!level);
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}
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static bool cap_has_mp_state;
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static uint64_t kvm_riscv_reg_id(CPURISCVState *env, uint64_t type,
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uint64_t idx)
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{
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@ -795,6 +797,24 @@ int kvm_arch_get_registers(CPUState *cs)
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return ret;
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}
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int kvm_riscv_sync_mpstate_to_kvm(RISCVCPU *cpu, int state)
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{
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if (cap_has_mp_state) {
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struct kvm_mp_state mp_state = {
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.mp_state = state
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};
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int ret = kvm_vcpu_ioctl(CPU(cpu), KVM_SET_MP_STATE, &mp_state);
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if (ret) {
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fprintf(stderr, "%s: failed to sync MP_STATE %d/%s\n",
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__func__, ret, strerror(-ret));
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return -1;
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}
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}
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return 0;
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}
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int kvm_arch_put_registers(CPUState *cs, int level)
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{
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int ret = 0;
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@ -814,6 +834,18 @@ int kvm_arch_put_registers(CPUState *cs, int level)
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return ret;
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}
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if (KVM_PUT_RESET_STATE == level) {
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RISCVCPU *cpu = RISCV_CPU(cs);
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if (cs->cpu_index == 0) {
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ret = kvm_riscv_sync_mpstate_to_kvm(cpu, KVM_MP_STATE_RUNNABLE);
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} else {
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ret = kvm_riscv_sync_mpstate_to_kvm(cpu, KVM_MP_STATE_STOPPED);
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}
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if (ret) {
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return ret;
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}
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}
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return ret;
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}
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@ -926,6 +958,7 @@ int kvm_arch_get_default_type(MachineState *ms)
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int kvm_arch_init(MachineState *ms, KVMState *s)
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{
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cap_has_mp_state = kvm_check_extension(s, KVM_CAP_MP_STATE);
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return 0;
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}
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@ -1008,14 +1041,25 @@ int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run)
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void kvm_riscv_reset_vcpu(RISCVCPU *cpu)
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{
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CPURISCVState *env = &cpu->env;
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int i;
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if (!kvm_enabled()) {
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return;
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}
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for (i = 0; i < 32; i++) {
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env->gpr[i] = 0;
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}
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env->pc = cpu->env.kernel_addr;
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env->gpr[10] = kvm_arch_vcpu_id(CPU(cpu)); /* a0 */
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env->gpr[11] = cpu->env.fdt_addr; /* a1 */
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env->satp = 0;
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env->mie = 0;
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env->stvec = 0;
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env->sscratch = 0;
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env->sepc = 0;
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env->scause = 0;
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env->stval = 0;
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env->mip = 0;
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}
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void kvm_riscv_set_irq(RISCVCPU *cpu, int irq, int level)
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@ -30,5 +30,6 @@ void kvm_riscv_aia_create(MachineState *machine, uint64_t group_shift,
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uint64_t aplic_base, uint64_t imsic_base,
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uint64_t guest_num);
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void riscv_kvm_aplic_request(void *opaque, int irq, int level);
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int kvm_riscv_sync_mpstate_to_kvm(RISCVCPU *cpu, int state);
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#endif
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