target/riscv: Make MPV only work when MPP != PRV_M
Upon MRET or explicit memory access with MPRV=1, MPV should be ignored when MPP=PRV_M. Signed-off-by: Weiwei Li <liweiwei@iscas.ac.cn> Signed-off-by: Junqiang Wang <wangjunqiang@iscas.ac.cn> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20230603134236.15719-2-liweiwei@iscas.ac.cn> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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@ -47,7 +47,8 @@ int riscv_cpu_mmu_index(CPURISCVState *env, bool ifetch)
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if (mode == PRV_M && get_field(status, MSTATUS_MPRV)) {
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mode = get_field(env->mstatus, MSTATUS_MPP);
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virt = get_field(env->mstatus, MSTATUS_MPV);
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virt = get_field(env->mstatus, MSTATUS_MPV) &&
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(mode != PRV_M);
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if (virt) {
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status = env->vsstatus;
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}
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@ -335,7 +335,8 @@ target_ulong helper_mret(CPURISCVState *env)
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riscv_raise_exception(env, RISCV_EXCP_INST_ACCESS_FAULT, GETPC());
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}
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target_ulong prev_virt = get_field(env->mstatus, MSTATUS_MPV);
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target_ulong prev_virt = get_field(env->mstatus, MSTATUS_MPV) &&
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(prev_priv != PRV_M);
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mstatus = set_field(mstatus, MSTATUS_MIE,
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get_field(mstatus, MSTATUS_MPIE));
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mstatus = set_field(mstatus, MSTATUS_MPIE, 1);
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