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char/cadence_uart: Use the TX fifo for transmission

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Populate the TxFIFO with the Tx data before sending. Prepares
support for proper Tx flow control implementation.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: bdf7f8af2ef02839bea18665701bc2612f7baa6f.1388626249.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Crosthwaite 2014-01-06 10:16:40 +00:00 committed by Peter Maydell
parent d0ac820fe4
commit 86baecc3e4
1 changed files with 16 additions and 1 deletions
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17
hw/char/cadence_uart.c
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@ -292,7 +292,22 @@ static void uart_write_tx_fifo(UartState *s, const uint8_t *buf, int size)
return;
}
qemu_chr_fe_write_all(s->chr, buf, size);
if (size > TX_FIFO_SIZE - s->tx_count) {
size = TX_FIFO_SIZE - s->tx_count;
/*
* This can only be a guest error via a bad tx fifo register push,
* as can_receive() should stop remote loop and echo modes ever getting
* us to here.
*/
qemu_log_mask(LOG_GUEST_ERROR, "cadence_uart: TxFIFO overflow");
s->r[R_CISR] |= UART_INTR_ROVR;
}
memcpy(s->tx_fifo + s->tx_count, buf, size);
s->tx_count += size;
qemu_chr_fe_write_all(s->chr, s->tx_fifo, s->tx_count);
s->tx_count = 0;
}
static void uart_receive(void *opaque, const uint8_t *buf, int size)