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ppc patch queue for 2018-03-19

Browse Source 
This pull request supersedes the one for 2018-03-15.  The only
 difference is one patch is removed, since it exposed some code which
 triggers ubsan warnings.
 
 Here's the set of accumulated patches now that we're into soft freeze.
 I've split new functionality into a ppc-for-2.13 branch, so this only
 has bugfixes.  Well.. and a couple of simple cleanups to make bugfixes
 easier, some test improvements and a trivial change to make command
 line options more obvious.  I think those are all acceptable for soft
 freeze.
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Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-2.12-20180319' into staging

ppc patch queue for 2018-03-19

This pull request supersedes the one for 2018-03-15.  The only
difference is one patch is removed, since it exposed some code which
triggers ubsan warnings.

Here's the set of accumulated patches now that we're into soft freeze.
I've split new functionality into a ppc-for-2.13 branch, so this only
has bugfixes.  Well.. and a couple of simple cleanups to make bugfixes
easier, some test improvements and a trivial change to make command
line options more obvious.  I think those are all acceptable for soft
freeze.

# gpg: Signature made Mon 19 Mar 2018 00:34:56 GMT
# gpg:                using RSA key 6C38CACA20D9B392
# gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>"
# gpg:                 aka "David Gibson (Red Hat) <dgibson@redhat.com>"
# gpg:                 aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>"
# gpg:                 aka "David Gibson (kernel.org) <dwg@kernel.org>"
# Primary key fingerprint: 75F4 6586 AE61 A66C C44E  87DC 6C38 CACA 20D9 B392

* remotes/dgibson/tags/ppc-for-2.12-20180319:
  target/ppc: fix tlbsync to check privilege level depending on GTSE
  ppc440_pcix: Change some error_report to qemu_log_mask(LOG_UNIMP, ...)
  hw/ppc/spapr: Allow "spapr-vlan" as NIC model name beside "ibmveth"
  PPC e500: Fix gap between u-boot and kernel
  hw/misc/macio: Mark the macio devices with user_creatable = false
  hw/ppc/prep: Fix implicit creation of "-drive if=scsi" devices
  tests/boot-serial: Check the 40p machine, too
  sii3112: Remove unneeded exit function

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell 2018-03-19 09:39:29 +00:00
commit 870c75b543
10 changed files with 36 additions and 28 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

12
hw/ide/sii3112.c
View File

@ -327,17 +327,6 @@ static void sii3112_pci_realize(PCIDevice *dev, Error **errp)
qemu_register_reset(sii3112_reset, s);
}
static void sii3112_pci_exitfn(PCIDevice *dev)
{
PCIIDEState *d = PCI_IDE(dev);
int i;
for (i = 0; i < 2; ++i) {
memory_region_del_subregion(&d->bmdma_bar, &d->bmdma[i].extra_io);
memory_region_del_subregion(&d->bmdma_bar, &d->bmdma[i].addr_ioport);
}
}
static void sii3112_pci_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
@ -348,7 +337,6 @@ static void sii3112_pci_class_init(ObjectClass *klass, void *data)
pd->class_id = PCI_CLASS_STORAGE_RAID;
pd->revision = 1;
pd->realize = sii3112_pci_realize;
pd->exit = sii3112_pci_exitfn;
dc->desc = "SiI3112A SATA controller";
set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
}

2
hw/misc/macio/macio.c
View File

@ -406,6 +406,8 @@ static void macio_class_init(ObjectClass *klass, void *data)
k->class_id = PCI_CLASS_OTHERS << 8;
dc->props = macio_properties;
set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
/* Reason: Uses serial_hds in macio_instance_init */
dc->user_creatable = false;
}
static const TypeInfo macio_oldworld_type_info = {

9
hw/ppc/e500.c
View File

@ -1009,6 +1009,10 @@ void ppce500_init(MachineState *machine, PPCE500Params *params)
}
cur_base = loadaddr + payload_size;
if (cur_base < (32 * 1024 * 1024)) {
/* u-boot occupies memory up to 32MB, so load blobs above */
cur_base = (32 * 1024 * 1024);
}
/* Load bare kernel only if no bios/u-boot has been provided */
if (machine->kernel_filename && !kernel_as_payload) {
@ -1025,11 +1029,6 @@ void ppce500_init(MachineState *machine, PPCE500Params *params)
cur_base += kernel_size;
}
if (cur_base < (32 * 1024 * 1024)) {
/* u-boot occupies memory up to 32MB, so load blobs above */
cur_base = (32 * 1024 * 1024);
}
/* Load initrd. */
if (machine->initrd_filename) {
initrd_base = (cur_base + INITRD_LOAD_PAD) & ~INITRD_PAD_MASK;

11
hw/ppc/ppc440_pcix.c
View File

@ -21,6 +21,7 @@
#include "qemu/osdep.h"
#include "qemu/error-report.h"
#include "qemu/log.h"
#include "hw/hw.h"
#include "hw/ppc/ppc.h"
#include "hw/ppc/ppc4xx.h"
@ -286,8 +287,9 @@ static void ppc440_pcix_reg_write4(void *opaque, hwaddr addr,
break;
default:
error_report("%s: unhandled PCI internal register 0x%lx", __func__,
(unsigned long)addr);
qemu_log_mask(LOG_UNIMP,
"%s: unhandled PCI internal register 0x%"HWADDR_PRIx"\n",
__func__, addr);
break;
}
}
@ -377,8 +379,9 @@ static uint64_t ppc440_pcix_reg_read4(void *opaque, hwaddr addr,
break;
default:
error_report("%s: invalid PCI internal register 0x%lx", __func__,
(unsigned long)addr);
qemu_log_mask(LOG_UNIMP,
"%s: invalid PCI internal register 0x%" HWADDR_PRIx "\n",
__func__, addr);
val = 0;
}

2
hw/ppc/prep.c
View File

@ -787,7 +787,7 @@ static void ibm_40p_init(MachineState *machine)
qdev_prop_set_uint32(dev, "equipment", 0xc0);
qdev_init_nofail(dev);
pci_create_simple(pci_bus, PCI_DEVFN(1, 0), "lsi53c810");
lsi53c810_create(pci_bus, PCI_DEVFN(1, 0));
/* XXX: s3-trio at PCI_DEVFN(2, 0) */
pci_vga_init(pci_bus);

5
hw/ppc/spapr.c
View File

@ -2607,10 +2607,11 @@ static void spapr_machine_init(MachineState *machine)
NICInfo *nd = &nd_table[i];
if (!nd->model) {
nd->model = g_strdup("ibmveth");
nd->model = g_strdup("spapr-vlan");
}
if (strcmp(nd->model, "ibmveth") == 0) {
if (g_str_equal(nd->model, "spapr-vlan") ||
g_str_equal(nd->model, "ibmveth")) {
spapr_vlan_create(spapr->vio_bus, nd);
} else {
pci_nic_init_nofail(&nd_table[i], phb->bus, nd->model, NULL);

7
hw/scsi/lsi53c895a.c
View File

@ -2279,3 +2279,10 @@ void lsi53c895a_create(PCIBus *bus)
scsi_bus_legacy_handle_cmdline(&s->bus);
}
void lsi53c810_create(PCIBus *bus, int devfn)
{
LSIState *s = LSI53C895A(pci_create_simple(bus, devfn, "lsi53c810"));
scsi_bus_legacy_handle_cmdline(&s->bus);
}

1
include/hw/pci/pci.h
View File

@ -708,6 +708,7 @@ PCIDevice *pci_create(PCIBus *bus, int devfn, const char *name);
PCIDevice *pci_create_simple(PCIBus *bus, int devfn, const char *name);
void lsi53c895a_create(PCIBus *bus);
void lsi53c810_create(PCIBus *bus, int devfn);
qemu_irq pci_allocate_irq(PCIDevice *pci_dev);
void pci_set_irq(PCIDevice *pci_dev, int level);

9
target/ppc/translate.c
View File

@ -4526,7 +4526,7 @@ static void gen_tlbie(DisasContext *ctx)
TCGv_i32 t1;
if (ctx->gtse) {
CHK_SV; /* If gtse is set then tblie is supervisor privileged */
CHK_SV; /* If gtse is set then tlbie is supervisor privileged */
} else {
CHK_HV; /* Else hypervisor privileged */
}
@ -4553,7 +4553,12 @@ static void gen_tlbsync(DisasContext *ctx)
#if defined(CONFIG_USER_ONLY)
GEN_PRIV;
#else
CHK_HV;
if (ctx->gtse) {
CHK_SV; /* If gtse is set then tlbsync is supervisor privileged */
} else {
CHK_HV; /* Else hypervisor privileged */
}
/* BookS does both ptesync and tlbsync make tlbsync a nop for server */
if (ctx->insns_flags & PPC_BOOKE) {

6
tests/boot-serial-test.c
View File

@ -75,11 +75,13 @@ typedef struct testdef {
static testdef_t tests[] = {
{ "alpha", "clipper", "", "PCI:" },
{ "ppc", "ppce500", "", "U-Boot" },
{ "ppc", "prep", "", "Open Hack'Ware BIOS" },
{ "ppc", "prep", "-m 96", "Memory size: 96 MB" },
{ "ppc", "40p", "-boot d", "Booting from device d" },
{ "ppc", "g3beige", "", "PowerPC,750" },
{ "ppc", "mac99", "", "PowerPC,G4" },
{ "ppc64", "ppce500", "", "U-Boot" },
{ "ppc64", "prep", "", "Open Hack'Ware BIOS" },
{ "ppc64", "prep", "-boot e", "Booting from device e" },
{ "ppc64", "40p", "-m 192", "Memory size: 192 MB" },
{ "ppc64", "mac99", "", "PowerPC,970FX" },
{ "ppc64", "pseries", "", "Open Firmware" },
{ "ppc64", "powernv", "-cpu POWER8", "OPAL" },