ppc: Update LPCR definitions
Includes all the bits up to ISA 2.07 Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> [clg: fixed checkpatch.pl errors ] Signed-off-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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@ -377,12 +377,16 @@ struct ppc_slb_t {
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#define LPCR_VPM1 (1ull << (63 - 1))
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#define LPCR_ISL (1ull << (63 - 2))
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#define LPCR_KBV (1ull << (63 - 3))
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#define LPCR_DPFD_SHIFT (63 - 11)
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#define LPCR_DPFD (0x3ull << LPCR_DPFD_SHIFT)
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#define LPCR_VRMASD_SHIFT (63 - 16)
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#define LPCR_VRMASD (0x1full << LPCR_VRMASD_SHIFT)
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#define LPCR_RMLS_SHIFT (63 - 37)
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#define LPCR_RMLS (0xfull << LPCR_RMLS_SHIFT)
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#define LPCR_ILE (1ull << (63 - 38))
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#define LPCR_MER (1ull << (63 - 52))
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#define LPCR_LPES0 (1ull << (63 - 60))
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#define LPCR_LPES1 (1ull << (63 - 61))
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#define LPCR_AIL_SHIFT (63 - 40) /* Alternate interrupt location */
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#define LPCR_AIL (3ull << LPCR_AIL_SHIFT)
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#define LPCR_ONL (1ull << (63 - 45))
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#define LPCR_P7_PECE0 (1ull << (63 - 49))
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#define LPCR_P7_PECE1 (1ull << (63 - 50))
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#define LPCR_P7_PECE2 (1ull << (63 - 51))
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@ -391,6 +395,12 @@ struct ppc_slb_t {
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#define LPCR_P8_PECE2 (1ull << (63 - 49))
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#define LPCR_P8_PECE3 (1ull << (63 - 50))
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#define LPCR_P8_PECE4 (1ull << (63 - 51))
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#define LPCR_MER (1ull << (63 - 52))
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#define LPCR_TC (1ull << (63 - 54))
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#define LPCR_LPES0 (1ull << (63 - 60))
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#define LPCR_LPES1 (1ull << (63 - 61))
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#define LPCR_RMI (1ull << (63 - 62))
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#define LPCR_HDICE (1ull << (63 - 63))
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#define msr_sf ((env->msr >> MSR_SF) & 1)
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#define msr_isf ((env->msr >> MSR_ISF) & 1)
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