OpenE2K/qemu-e2k
13
4
Fork 0
Code Issues 4 Pull Requests Projects 2 Releases Activity

Merge remote-tracking branch 'stefanha/tracing' into staging

Browse Source
This commit is contained in:
Anthony Liguori 2011-09-02 10:08:48 -05:00
commit 88adbdfdf4
21 changed files with 722 additions and 493 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
Makefile
View File

@ -209,6 +209,7 @@ clean:
rm -Rf .libs
rm -f slirp/*.o slirp/*.d audio/*.o audio/*.d block/*.o block/*.d net/*.o net/*.d fsdev/*.o fsdev/*.d ui/*.o ui/*.d qapi/*.o qapi/*.d qga/*.o qga/*.d
rm -f qemu-img-cmds.h
rm -f trace/*.o trace/*.d
rm -f trace.c trace.h trace.c-timestamp trace.h-timestamp
rm -f trace-dtrace.dtrace trace-dtrace.dtrace-timestamp
rm -f trace-dtrace.h trace-dtrace.h-timestamp

22
Makefile.objs
View File

@ -372,18 +372,24 @@ trace-dtrace.lo: trace-dtrace.dtrace
$(call quiet-command,$(LIBTOOL) --mode=compile --tag=CC dtrace -o $@ -G -s $<, " lt GEN trace-dtrace.o")
endif
simpletrace.o: simpletrace.c $(GENERATED_HEADERS)
trace/simple.o: trace/simple.c $(GENERATED_HEADERS)
ifeq ($(TRACE_BACKEND),dtrace)
trace-obj-y = trace-dtrace.o
else
trace-obj-$(CONFIG_TRACE_DTRACE) += trace-dtrace.o
ifneq ($(TRACE_BACKEND),dtrace)
trace-obj-y = trace.o
ifeq ($(TRACE_BACKEND),simple)
trace-obj-y += simpletrace.o
user-obj-y += qemu-timer-common.o
endif
endif
trace-nested-$(CONFIG_TRACE_DEFAULT) += default.o
trace-nested-$(CONFIG_TRACE_SIMPLE) += simple.o
trace-obj-$(CONFIG_TRACE_SIMPLE) += qemu-timer-common.o
trace-nested-$(CONFIG_TRACE_STDERR) += stderr.o
trace-nested-y += control.o
trace-obj-y += $(addprefix trace/, $(trace-nested-y))
######################################################################
# smartcard

8
Makefile.target
View File

@ -44,7 +44,7 @@ endif
config-target.h: config-target.h-timestamp
config-target.h-timestamp: config-target.mak
ifdef CONFIG_SYSTEMTAP_TRACE
ifdef CONFIG_TRACE_SYSTEMTAP
stap: $(QEMU_PROG).stp
ifdef CONFIG_USER_ONLY
@ -398,7 +398,7 @@ obj-y += $(addprefix ../, $(trace-obj-y))
obj-$(CONFIG_GDBSTUB_XML) += gdbstub-xml.o
$(QEMU_PROG): $(obj-y) $(obj-$(TARGET_BASE_ARCH)-y)
$(call LINK,$(obj-y) $(obj-$(TARGET_BASE_ARCH)-y))
$(call LINK,$^)
gdbstub-xml.c: $(TARGET_XML_FILES) $(SRC_PATH)/scripts/feature_to_c.sh
@ -414,7 +414,7 @@ clean:
rm -f *.o *.a *~ $(PROGS) nwfpe/*.o fpu/*.o
rm -f *.d */*.d tcg/*.o ide/*.o 9pfs/*.o
rm -f hmp-commands.h qmp-commands.h gdbstub-xml.c
ifdef CONFIG_SYSTEMTAP_TRACE
ifdef CONFIG_TRACE_SYSTEMTAP
rm -f *.stp
endif
@ -425,7 +425,7 @@ ifneq ($(STRIP),)
$(STRIP) $(patsubst %,"$(DESTDIR)$(bindir)/%",$(PROGS))
endif
endif
ifdef CONFIG_SYSTEMTAP_TRACE
ifdef CONFIG_TRACE_SYSTEMTAP
$(INSTALL_DIR) "$(DESTDIR)$(datadir)/../systemtap/tapset"
$(INSTALL_DATA) $(QEMU_PROG).stp "$(DESTDIR)$(datadir)/../systemtap/tapset"
endif

27
configure vendored
View File

@ -3064,18 +3064,35 @@ bsd)
;;
esac
# use default implementation for tracing backend-specific routines
trace_default=yes
echo "TRACE_BACKEND=$trace_backend" >> $config_host_mak
if test "$trace_backend" = "simple"; then
echo "CONFIG_SIMPLE_TRACE=y" >> $config_host_mak
if test "$trace_backend" = "nop"; then
echo "CONFIG_TRACE_NOP=y" >> $config_host_mak
fi
# Set the appropriate trace file.
if test "$trace_backend" = "simple"; then
echo "CONFIG_TRACE_SIMPLE=y" >> $config_host_mak
trace_default=no
# Set the appropriate trace file.
trace_file="\"$trace_file-\" FMT_pid"
fi
if test "$trace_backend" = "dtrace" -a "$trace_backend_stap" = "yes" ; then
echo "CONFIG_SYSTEMTAP_TRACE=y" >> $config_host_mak
if test "$trace_backend" = "stderr"; then
echo "CONFIG_TRACE_STDERR=y" >> $config_host_mak
trace_default=no
fi
if test "$trace_backend" = "ust"; then
echo "CONFIG_TRACE_UST=y" >> $config_host_mak
fi
if test "$trace_backend" = "dtrace"; then
echo "CONFIG_TRACE_DTRACE=y" >> $config_host_mak
if test "$trace_backend_stap" = "yes" ; then
echo "CONFIG_TRACE_SYSTEMTAP=y" >> $config_host_mak
fi
fi
echo "CONFIG_TRACE_FILE=$trace_file" >> $config_host_mak
if test "$trace_default" = "yes"; then
echo "CONFIG_TRACE_DEFAULT=y" >> $config_host_mak
fi
echo "TOOLS=$tools" >> $config_host_mak
echo "ROMS=$roms" >> $config_host_mak

73
docs/tracing.txt
View File

@ -12,13 +12,14 @@ for debugging, profiling, and observing execution.
./configure --trace-backend=simple
make
2. Enable trace events you are interested in:
2. Create a file with the events you want to trace:
$EDITOR trace-events # remove "disable" from events you want
echo bdrv_aio_readv > /tmp/events
echo bdrv_aio_writev >> /tmp/events
3. Run the virtual machine to produce a trace file:
qemu ... # your normal QEMU invocation
qemu -trace events=/tmp/events ... # your normal QEMU invocation
4. Pretty-print the binary trace file:
@ -38,7 +39,7 @@ generate code for the trace events. Trace events are invoked directly from
source code like this:
#include "trace.h" /* needed for trace event prototype */
void *qemu_malloc(size_t size)
{
void *ptr;
@ -103,10 +104,45 @@ portability macros, ensure they are preceded and followed by double quotes:
4. Name trace events after their function. If there are multiple trace events
in one function, append a unique distinguisher at the end of the name.
5. Declare trace events with the "disable" keyword. Some trace events can
produce a lot of output and users are typically only interested in a subset
of trace events. Marking trace events disabled by default saves the user
from having to manually disable noisy trace events.
5. If specific trace events are going to be called a huge number of times, this
might have a noticeable performance impact even when the trace events are
programmatically disabled. In this case you should declare the trace event
with the "disable" property, which will effectively disable it at compile
time (using the "nop" backend).
== Generic interface and monitor commands ==
You can programmatically query and control the dynamic state of trace events
through a backend-agnostic interface:
* trace_print_events
* trace_event_set_state
Enables or disables trace events at runtime inside QEMU.
The function returns "true" if the state of the event has been successfully
changed, or "false" otherwise:
#include "trace/control.h"
trace_event_set_state("virtio_irq", true); /* enable */
[...]
trace_event_set_state("virtio_irq", false); /* disable */
Note that some of the backends do not provide an implementation for this
interface, in which case QEMU will just print a warning.
This functionality is also provided through monitor commands:
* info trace-events
View available trace events and their state. State 1 means enabled, state 0
means disabled.
* trace-event NAME on|off
Enable/disable a given trace event.
The "-trace events=<file>" command line argument can be used to enable the
events listed in <file> from the very beginning of the program. This file must
contain one event name per line.
== Trace backends ==
@ -131,6 +167,9 @@ The "nop" backend generates empty trace event functions so that the compiler
can optimize out trace events completely. This is the default and imposes no
performance penalty.
Note that regardless of the selected trace backend, events with the "disable"
property will be generated with the "nop" backend.
=== Stderr ===
The "stderr" backend sends trace events directly to standard error. This
@ -157,27 +196,9 @@ unless you have specific needs for more advanced backends.
flushed and emptied. This means the 'info trace' will display few or no
entries if the buffer has just been flushed.
* info trace-events
View available trace events and their state. State 1 means enabled, state 0
means disabled.
* trace-event NAME on|off
Enable/disable a given trace event.
* trace-file on|off|flush|set <path>
Enable/disable/flush the trace file or set the trace file name.
==== Enabling/disabling trace events programmatically ====
The st_change_trace_event_state() function can be used to enable or disable trace
events at runtime inside QEMU:
#include "trace.h"
st_change_trace_event_state("virtio_irq", true); /* enable */
[...]
st_change_trace_event_state("virtio_irq", false); /* disable */
==== Analyzing trace files ====
The "simple" backend produces binary trace files that can be formatted with the

13
hmp-commands.hx
View File

@ -180,13 +180,12 @@ STEXI
Output logs to @var{filename}.
ETEXI
#ifdef CONFIG_SIMPLE_TRACE
{
.name = "trace-event",
.args_type = "name:s,option:b",
.params = "name on|off",
.help = "changes status of a specific trace event",
.mhandler.cmd = do_change_trace_event_state,
.mhandler.cmd = do_trace_event_set_state,
},
STEXI
@ -195,6 +194,7 @@ STEXI
changes status of a trace event
ETEXI
#if defined(CONFIG_SIMPLE_TRACE)
{
.name = "trace-file",
.args_type = "op:s?,arg:F?",
@ -1354,15 +1354,18 @@ show roms
@end table
ETEXI
#ifdef CONFIG_SIMPLE_TRACE
#ifdef CONFIG_TRACE_SIMPLE
STEXI
@item info trace
show contents of trace buffer
@item info trace-events
show available trace events and their state
ETEXI
#endif
STEXI
@item info trace-events
show available trace events and their state
ETEXI
STEXI
@end table
ETEXI

30
monitor.c
View File

@ -57,9 +57,11 @@
#include "json-parser.h"
#include "osdep.h"
#include "cpu.h"
#ifdef CONFIG_SIMPLE_TRACE
#include "trace.h"
#include "trace/control.h"
#ifdef CONFIG_TRACE_SIMPLE
#include "trace/simple.h"
#endif
#include "trace/control.h"
#include "ui/qemu-spice.h"
//#define DEBUG
@ -592,18 +594,18 @@ static void do_help_cmd(Monitor *mon, const QDict *qdict)
help_cmd(mon, qdict_get_try_str(qdict, "name"));
}
#ifdef CONFIG_SIMPLE_TRACE
static void do_change_trace_event_state(Monitor *mon, const QDict *qdict)
static void do_trace_event_set_state(Monitor *mon, const QDict *qdict)
{
const char *tp_name = qdict_get_str(qdict, "name");
bool new_state = qdict_get_bool(qdict, "option");
int ret = st_change_trace_event_state(tp_name, new_state);
int ret = trace_event_set_state(tp_name, new_state);
if (!ret) {
monitor_printf(mon, "unknown event name \"%s\"\n", tp_name);
}
}
#ifdef CONFIG_SIMPLE_TRACE
static void do_trace_file(Monitor *mon, const QDict *qdict)
{
const char *op = qdict_get_try_str(qdict, "op");
@ -996,18 +998,18 @@ static void do_info_cpu_stats(Monitor *mon)
}
#endif
#if defined(CONFIG_SIMPLE_TRACE)
#if defined(CONFIG_TRACE_SIMPLE)
static void do_info_trace(Monitor *mon)
{
st_print_trace((FILE *)mon, &monitor_fprintf);
}
static void do_info_trace_events(Monitor *mon)
{
st_print_trace_events((FILE *)mon, &monitor_fprintf);
}
#endif
static void do_trace_print_events(Monitor *mon)
{
trace_print_events((FILE *)mon, &monitor_fprintf);
}
/**
* do_quit(): Quit QEMU execution
*/
@ -3135,7 +3137,7 @@ static const mon_cmd_t info_cmds[] = {
.help = "show roms",
.mhandler.info = do_info_roms,
},
#if defined(CONFIG_SIMPLE_TRACE)
#if defined(CONFIG_TRACE_SIMPLE)
{
.name = "trace",
.args_type = "",
@ -3143,14 +3145,14 @@ static const mon_cmd_t info_cmds[] = {
.help = "show current contents of trace buffer",
.mhandler.info = do_info_trace,
},
#endif
{
.name = "trace-events",
.args_type = "",
.params = "",
.help = "show available trace-events & their state",
.mhandler.info = do_info_trace_events,
.mhandler.info = do_trace_print_events,
},
#endif
{
.name = NULL,
},

7
qemu-config.c
View File

@ -303,20 +303,21 @@ static QemuOptsList qemu_mon_opts = {
},
};
#ifdef CONFIG_SIMPLE_TRACE
static QemuOptsList qemu_trace_opts = {
.name = "trace",
.implied_opt_name = "trace",
.head = QTAILQ_HEAD_INITIALIZER(qemu_trace_opts.head),
.desc = {
{
.name = "events",
.type = QEMU_OPT_STRING,
},{
.name = "file",
.type = QEMU_OPT_STRING,
},
{ /* end of list */ }
},
};
#endif
static QemuOptsList qemu_cpudef_opts = {
.name = "cpudef",
@ -517,9 +518,7 @@ static QemuOptsList *vm_config_groups[32] = {
&qemu_global_opts,
&qemu_mon_opts,
&qemu_cpudef_opts,
#ifdef CONFIG_SIMPLE_TRACE
&qemu_trace_opts,
#endif
&qemu_option_rom_opts,
&qemu_machine_opts,
&qemu_boot_opts,

27
qemu-options.hx
View File

@ -2436,17 +2436,32 @@ Normally QEMU loads a configuration file from @var{sysconfdir}/qemu.conf and
@var{sysconfdir}/target-@var{ARCH}.conf on startup. The @code{-nodefconfig}
option will prevent QEMU from loading these configuration files at startup.
ETEXI
#ifdef CONFIG_SIMPLE_TRACE
DEF("trace", HAS_ARG, QEMU_OPTION_trace,
"-trace\n"
" Specify a trace file to log traces to\n",
"-trace [events=<file>][,file=<file>]\n"
" specify tracing options\n",
QEMU_ARCH_ALL)
STEXI
@item -trace
HXCOMM This line is not accurate, as some sub-options are backend-specific but
HXCOMM HX does not support conditional compilation of text.
@item -trace [events=@var{file}][,file=@var{file}]
@findex -trace
Specify a trace file to log output traces to.
Specify tracing options.
@table @option
@item events=@var{file}
Immediately enable events listed in @var{file}.
The file must contain one event name (as listed in the @var{trace-events} file)
per line.
This option is only available when using the @var{simple} and @var{stderr}
tracing backends.
@item file=@var{file}
Log output traces to @var{file}.
This option is only available when using the @var{simple} tracing backend.
@end table
ETEXI
#endif
HXCOMM This is the last statement. Insert new options before this line!
STEXI

4
scripts/simpletrace.py
View File

@ -102,10 +102,10 @@ def process(events, log, analyzer):
fn_argcount = len(inspect.getargspec(fn)[0]) - 1
if fn_argcount == event_argcount + 1:
# Include timestamp as first argument
return lambda _, rec: fn(*rec[1:2 + fn_argcount])
return lambda _, rec: fn(*rec[1:2 + event_argcount])
else:
# Just arguments, no timestamp
return lambda _, rec: fn(*rec[2:2 + fn_argcount])
return lambda _, rec: fn(*rec[2:2 + event_argcount])
analyzer.begin()
fn_cache = {}

116
scripts/tracetool
View File

@ -43,7 +43,26 @@ EOF
# Get the name of a trace event
get_name()
{
echo ${1%%\(*}
local name
name=${1%%\(*}
echo "${name##* }"
}
# Get the given property of a trace event
# 1: trace-events line
# 2: property name
# -> return 0 if property is present, or 1 otherwise
has_property()
{
local props prop
props=${1%%\(*}
props=${props% *}
for prop in $props; do
if [ "$prop" = "$2" ]; then
return 0
fi
done
return 1
}
# Get the argument list of a trace event, including types and names
@ -101,20 +120,6 @@ get_fmt()
echo "$fmt"
}
# Get the state of a trace event
get_state()
{
local str disable state
str=$(get_name "$1")
disable=${str##disable }
if [ "$disable" = "$str" ] ; then
state=1
else
state=0
fi
echo "$state"
}
linetoh_begin_nop()
{
return
@ -158,7 +163,7 @@ linetoc_end_nop()
linetoh_begin_simple()
{
cat <<EOF
#include "simpletrace.h"
#include "trace/simple.h"
EOF
simple_event_num=0
@ -174,14 +179,10 @@ cast_args_to_uint64_t()
linetoh_simple()
{
local name args argc trace_args state
local name args argc trace_args
name=$(get_name "$1")
args=$(get_args "$1")
argc=$(get_argc "$1")
state=$(get_state "$1")
if [ "$state" = "0" ]; then
name=${name##disable }
fi
trace_args="$simple_event_num"
if [ "$argc" -gt 0 ]
@ -220,14 +221,10 @@ EOF
linetoc_simple()
{
local name state
local name
name=$(get_name "$1")
state=$(get_state "$1")
if [ "$state" = "0" ] ; then
name=${name##disable }
fi
cat <<EOF
{.tp_name = "$name", .state=$state},
{.tp_name = "$name", .state=0},
EOF
simple_event_num=$((simple_event_num + 1))
}
@ -244,7 +241,12 @@ linetoh_begin_stderr()
{
cat <<EOF
#include <stdio.h>
#include "trace/stderr.h"
extern TraceEvent trace_list[];
EOF
stderr_event_num=0
}
linetoh_stderr()
@ -263,29 +265,47 @@ linetoh_stderr()
cat <<EOF
static inline void trace_$name($args)
{
fprintf(stderr, "$name $fmt\n" $argnames);
if (trace_list[$stderr_event_num].state != 0) {
fprintf(stderr, "$name $fmt\n" $argnames);
}
}
EOF
stderr_event_num=$((stderr_event_num + 1))
}
linetoh_end_stderr()
{
return
cat <<EOF
#define NR_TRACE_EVENTS $stderr_event_num
EOF
}
linetoc_begin_stderr()
{
return
cat <<EOF
#include "trace.h"
TraceEvent trace_list[] = {
EOF
stderr_event_num=0
}
linetoc_stderr()
{
return
local name
name=$(get_name "$1")
cat <<EOF
{.tp_name = "$name", .state=0},
EOF
stderr_event_num=$(($stderr_event_num + 1))
}
linetoc_end_stderr()
{
return
cat <<EOF
};
EOF
}
#END OF STDERR
@ -379,14 +399,10 @@ EOF
linetoh_dtrace()
{
local name args argnames state nameupper
local name args argnames nameupper
name=$(get_name "$1")
args=$(get_args "$1")
argnames=$(get_argnames "$1", ",")
state=$(get_state "$1")
if [ "$state" = "0" ] ; then
name=${name##disable }
fi
nameupper=`echo $name | tr '[:lower:]' '[:upper:]'`
@ -430,13 +446,9 @@ EOF
linetod_dtrace()
{
local name args state
local name args
name=$(get_name "$1")
args=$(get_args "$1")
state=$(get_state "$1")
if [ "$state" = "0" ] ; then
name=${name##disable }
fi
# DTrace provider syntax expects foo() for empty
# params, not foo(void)
@ -464,14 +476,10 @@ linetostap_begin_dtrace()
linetostap_dtrace()
{
local i arg name args arglist state
local i arg name args arglist
name=$(get_name "$1")
args=$(get_args "$1")
arglist=$(get_argnames "$1", "")
state=$(get_state "$1")
if [ "$state" = "0" ] ; then
name=${name##disable }
fi
# Define prototype for probe arguments
cat <<EOF
@ -516,18 +524,10 @@ convert()
# Skip comments and empty lines
test -z "${str%%#*}" && continue
# Process the line. The nop backend handles disabled lines.
disable=${str%%disable *}
echo
if test -z "$disable"; then
# Pass the disabled state as an arg for the simple
# or DTrace backends which handle it dynamically.
# For all other backends, call lineto$1_nop()
if [ $backend = "simple" -o "$backend" = "dtrace" ]; then
"$process_line" "$str"
else
"lineto$1_nop" "${str##disable }"
fi
# Process the line. The nop backend handles disabled lines.
if has_property "$str" "disable"; then
"lineto$1_nop" "$str"
else
"$process_line" "$str"
fi

2
tests/test_path.c
View File

@ -4,7 +4,7 @@
#include "../cutils.c"
#include "../path.c"
#include "../trace.c"
#ifdef CONFIG_SIMPLE_TRACE
#ifdef CONFIG_TRACE_SIMPLE
#include "../simpletrace.c"
#endif

651
trace-events
View File

@ -17,9 +17,6 @@
# Example: qemu_malloc(size_t size) "size %zu"
#
# The "disable" keyword will build without the trace event.
# In case of 'simple' trace backend, it will allow the trace event to be
# compiled, but this would be turned off by default. It can be toggled on via
# the monitor.
#
# The <name> must be a valid as a C function name.
#
@ -29,439 +26,439 @@
# The <format-string> should be a sprintf()-compatible format string.
# qemu-malloc.c
disable qemu_malloc(size_t size, void *ptr) "size %zu ptr %p"
disable qemu_realloc(void *ptr, size_t size, void *newptr) "ptr %p size %zu newptr %p"
disable qemu_free(void *ptr) "ptr %p"
qemu_malloc(size_t size, void *ptr) "size %zu ptr %p"
qemu_realloc(void *ptr, size_t size, void *newptr) "ptr %p size %zu newptr %p"
qemu_free(void *ptr) "ptr %p"
# osdep.c
disable qemu_memalign(size_t alignment, size_t size, void *ptr) "alignment %zu size %zu ptr %p"
disable qemu_vmalloc(size_t size, void *ptr) "size %zu ptr %p"
disable qemu_vfree(void *ptr) "ptr %p"
qemu_memalign(size_t alignment, size_t size, void *ptr) "alignment %zu size %zu ptr %p"
qemu_vmalloc(size_t size, void *ptr) "size %zu ptr %p"
qemu_vfree(void *ptr) "ptr %p"
# hw/virtio.c
disable virtqueue_fill(void *vq, const void *elem, unsigned int len, unsigned int idx) "vq %p elem %p len %u idx %u"
disable virtqueue_flush(void *vq, unsigned int count) "vq %p count %u"
disable virtqueue_pop(void *vq, void *elem, unsigned int in_num, unsigned int out_num) "vq %p elem %p in_num %u out_num %u"
disable virtio_queue_notify(void *vdev, int n, void *vq) "vdev %p n %d vq %p"
disable virtio_irq(void *vq) "vq %p"
disable virtio_notify(void *vdev, void *vq) "vdev %p vq %p"
virtqueue_fill(void *vq, const void *elem, unsigned int len, unsigned int idx) "vq %p elem %p len %u idx %u"
virtqueue_flush(void *vq, unsigned int count) "vq %p count %u"
virtqueue_pop(void *vq, void *elem, unsigned int in_num, unsigned int out_num) "vq %p elem %p in_num %u out_num %u"
virtio_queue_notify(void *vdev, int n, void *vq) "vdev %p n %d vq %p"
virtio_irq(void *vq) "vq %p"
virtio_notify(void *vdev, void *vq) "vdev %p vq %p"
# hw/virtio-serial-bus.c
disable virtio_serial_send_control_event(unsigned int port, uint16_t event, uint16_t value) "port %u, event %u, value %u"
disable virtio_serial_throttle_port(unsigned int port, bool throttle) "port %u, throttle %d"
disable virtio_serial_handle_control_message(uint16_t event, uint16_t value) "event %u, value %u"
disable virtio_serial_handle_control_message_port(unsigned int port) "port %u"
virtio_serial_send_control_event(unsigned int port, uint16_t event, uint16_t value) "port %u, event %u, value %u"
virtio_serial_throttle_port(unsigned int port, bool throttle) "port %u, throttle %d"
virtio_serial_handle_control_message(uint16_t event, uint16_t value) "event %u, value %u"
virtio_serial_handle_control_message_port(unsigned int port) "port %u"
# hw/virtio-console.c
disable virtio_console_flush_buf(unsigned int port, size_t len, ssize_t ret) "port %u, in_len %zu, out_len %zd"
disable virtio_console_chr_read(unsigned int port, int size) "port %u, size %d"
disable virtio_console_chr_event(unsigned int port, int event) "port %u, event %d"
virtio_console_flush_buf(unsigned int port, size_t len, ssize_t ret) "port %u, in_len %zu, out_len %zd"
virtio_console_chr_read(unsigned int port, int size) "port %u, size %d"
virtio_console_chr_event(unsigned int port, int event) "port %u, event %d"
# block.c
disable multiwrite_cb(void *mcb, int ret) "mcb %p ret %d"
disable bdrv_aio_multiwrite(void *mcb, int num_callbacks, int num_reqs) "mcb %p num_callbacks %d num_reqs %d"
disable bdrv_aio_multiwrite_earlyfail(void *mcb) "mcb %p"
disable bdrv_aio_multiwrite_latefail(void *mcb, int i) "mcb %p i %d"
disable bdrv_aio_flush(void *bs, void *opaque) "bs %p opaque %p"
disable bdrv_aio_readv(void *bs, int64_t sector_num, int nb_sectors, void *opaque) "bs %p sector_num %"PRId64" nb_sectors %d opaque %p"
disable bdrv_aio_writev(void *bs, int64_t sector_num, int nb_sectors, void *opaque) "bs %p sector_num %"PRId64" nb_sectors %d opaque %p"
disable bdrv_set_locked(void *bs, int locked) "bs %p locked %d"
disable bdrv_co_readv(void *bs, int64_t sector_num, int nb_sector) "bs %p sector_num %"PRId64" nb_sectors %d"
disable bdrv_co_writev(void *bs, int64_t sector_num, int nb_sector) "bs %p sector_num %"PRId64" nb_sectors %d"
disable bdrv_co_io(int is_write, void *acb) "is_write %d acb %p"
multiwrite_cb(void *mcb, int ret) "mcb %p ret %d"
bdrv_aio_multiwrite(void *mcb, int num_callbacks, int num_reqs) "mcb %p num_callbacks %d num_reqs %d"
bdrv_aio_multiwrite_earlyfail(void *mcb) "mcb %p"
bdrv_aio_multiwrite_latefail(void *mcb, int i) "mcb %p i %d"
bdrv_aio_flush(void *bs, void *opaque) "bs %p opaque %p"
bdrv_aio_readv(void *bs, int64_t sector_num, int nb_sectors, void *opaque) "bs %p sector_num %"PRId64" nb_sectors %d opaque %p"
bdrv_aio_writev(void *bs, int64_t sector_num, int nb_sectors, void *opaque) "bs %p sector_num %"PRId64" nb_sectors %d opaque %p"
bdrv_set_locked(void *bs, int locked) "bs %p locked %d"
bdrv_co_readv(void *bs, int64_t sector_num, int nb_sector) "bs %p sector_num %"PRId64" nb_sectors %d"
bdrv_co_writev(void *bs, int64_t sector_num, int nb_sector) "bs %p sector_num %"PRId64" nb_sectors %d"
bdrv_co_io(int is_write, void *acb) "is_write %d acb %p"
# hw/virtio-blk.c
disable virtio_blk_req_complete(void *req, int status) "req %p status %d"
disable virtio_blk_rw_complete(void *req, int ret) "req %p ret %d"
disable virtio_blk_handle_write(void *req, uint64_t sector, size_t nsectors) "req %p sector %"PRIu64" nsectors %zu"
virtio_blk_req_complete(void *req, int status) "req %p status %d"
virtio_blk_rw_complete(void *req, int ret) "req %p ret %d"
virtio_blk_handle_write(void *req, uint64_t sector, size_t nsectors) "req %p sector %"PRIu64" nsectors %zu"
# posix-aio-compat.c
disable paio_submit(void *acb, void *opaque, int64_t sector_num, int nb_sectors, int type) "acb %p opaque %p sector_num %"PRId64" nb_sectors %d type %d"
disable paio_complete(void *acb, void *opaque, int ret) "acb %p opaque %p ret %d"
disable paio_cancel(void *acb, void *opaque) "acb %p opaque %p"
paio_submit(void *acb, void *opaque, int64_t sector_num, int nb_sectors, int type) "acb %p opaque %p sector_num %"PRId64" nb_sectors %d type %d"
paio_complete(void *acb, void *opaque, int ret) "acb %p opaque %p ret %d"
paio_cancel(void *acb, void *opaque) "acb %p opaque %p"
# ioport.c
disable cpu_in(unsigned int addr, unsigned int val) "addr %#x value %u"
disable cpu_out(unsigned int addr, unsigned int val) "addr %#x value %u"
cpu_in(unsigned int addr, unsigned int val) "addr %#x value %u"
cpu_out(unsigned int addr, unsigned int val) "addr %#x value %u"
# balloon.c
# Since requests are raised via monitor, not many tracepoints are needed.
disable balloon_event(void *opaque, unsigned long addr) "opaque %p addr %lu"
balloon_event(void *opaque, unsigned long addr) "opaque %p addr %lu"
# hw/apic.c
disable apic_local_deliver(int vector, uint32_t lvt) "vector %d delivery mode %d"
disable apic_deliver_irq(uint8_t dest, uint8_t dest_mode, uint8_t delivery_mode, uint8_t vector_num, uint8_t trigger_mode) "dest %d dest_mode %d delivery_mode %d vector %d trigger_mode %d"
disable cpu_set_apic_base(uint64_t val) "%016"PRIx64""
disable cpu_get_apic_base(uint64_t val) "%016"PRIx64""
disable apic_mem_readl(uint64_t addr, uint32_t val) "%"PRIx64" = %08x"
disable apic_mem_writel(uint64_t addr, uint32_t val) "%"PRIx64" = %08x"
apic_local_deliver(int vector, uint32_t lvt) "vector %d delivery mode %d"
apic_deliver_irq(uint8_t dest, uint8_t dest_mode, uint8_t delivery_mode, uint8_t vector_num, uint8_t trigger_mode) "dest %d dest_mode %d delivery_mode %d vector %d trigger_mode %d"
cpu_set_apic_base(uint64_t val) "%016"PRIx64""
cpu_get_apic_base(uint64_t val) "%016"PRIx64""
apic_mem_readl(uint64_t addr, uint32_t val) "%"PRIx64" = %08x"
apic_mem_writel(uint64_t addr, uint32_t val) "%"PRIx64" = %08x"
# coalescing
disable apic_reset_irq_delivered(int apic_irq_delivered) "old coalescing %d"
disable apic_get_irq_delivered(int apic_irq_delivered) "returning coalescing %d"
disable apic_set_irq(int apic_irq_delivered) "coalescing %d"
apic_reset_irq_delivered(int apic_irq_delivered) "old coalescing %d"
apic_get_irq_delivered(int apic_irq_delivered) "returning coalescing %d"
apic_set_irq(int apic_irq_delivered) "coalescing %d"
# hw/cs4231.c
disable cs4231_mem_readl_dreg(uint32_t reg, uint32_t ret) "read dreg %d: 0x%02x"
disable cs4231_mem_readl_reg(uint32_t reg, uint32_t ret) "read reg %d: 0x%08x"
disable cs4231_mem_writel_reg(uint32_t reg, uint32_t old, uint32_t val) "write reg %d: 0x%08x -> 0x%08x"
disable cs4231_mem_writel_dreg(uint32_t reg, uint32_t old, uint32_t val) "write dreg %d: 0x%02x -> 0x%02x"
cs4231_mem_readl_dreg(uint32_t reg, uint32_t ret) "read dreg %d: 0x%02x"
cs4231_mem_readl_reg(uint32_t reg, uint32_t ret) "read reg %d: 0x%08x"
cs4231_mem_writel_reg(uint32_t reg, uint32_t old, uint32_t val) "write reg %d: 0x%08x -> 0x%08x"
cs4231_mem_writel_dreg(uint32_t reg, uint32_t old, uint32_t val) "write dreg %d: 0x%02x -> 0x%02x"
# hw/ds1225y.c
disable nvram_read(uint32_t addr, uint32_t ret) "read addr %d: 0x%02x"
disable nvram_write(uint32_t addr, uint32_t old, uint32_t val) "write addr %d: 0x%02x -> 0x%02x"
nvram_read(uint32_t addr, uint32_t ret) "read addr %d: 0x%02x"
nvram_write(uint32_t addr, uint32_t old, uint32_t val) "write addr %d: 0x%02x -> 0x%02x"
# hw/eccmemctl.c
disable ecc_mem_writel_mer(uint32_t val) "Write memory enable %08x"
disable ecc_mem_writel_mdr(uint32_t val) "Write memory delay %08x"
disable ecc_mem_writel_mfsr(uint32_t val) "Write memory fault status %08x"
disable ecc_mem_writel_vcr(uint32_t val) "Write slot configuration %08x"
disable ecc_mem_writel_dr(uint32_t val) "Write diagnostic %08x"
disable ecc_mem_writel_ecr0(uint32_t val) "Write event count 1 %08x"
disable ecc_mem_writel_ecr1(uint32_t val) "Write event count 2 %08x"
disable ecc_mem_readl_mer(uint32_t ret) "Read memory enable %08x"
disable ecc_mem_readl_mdr(uint32_t ret) "Read memory delay %08x"
disable ecc_mem_readl_mfsr(uint32_t ret) "Read memory fault status %08x"
disable ecc_mem_readl_vcr(uint32_t ret) "Read slot configuration %08x"
disable ecc_mem_readl_mfar0(uint32_t ret) "Read memory fault address 0 %08x"
disable ecc_mem_readl_mfar1(uint32_t ret) "Read memory fault address 1 %08x"
disable ecc_mem_readl_dr(uint32_t ret) "Read diagnostic %08x"
disable ecc_mem_readl_ecr0(uint32_t ret) "Read event count 1 %08x"
disable ecc_mem_readl_ecr1(uint32_t ret) "Read event count 2 %08x"
disable ecc_diag_mem_writeb(uint64_t addr, uint32_t val) "Write diagnostic %"PRId64" = %02x"
disable ecc_diag_mem_readb(uint64_t addr, uint32_t ret) "Read diagnostic %"PRId64"= %02x"
ecc_mem_writel_mer(uint32_t val) "Write memory enable %08x"
ecc_mem_writel_mdr(uint32_t val) "Write memory delay %08x"
ecc_mem_writel_mfsr(uint32_t val) "Write memory fault status %08x"
ecc_mem_writel_vcr(uint32_t val) "Write slot configuration %08x"
ecc_mem_writel_dr(uint32_t val) "Write diagnostic %08x"
ecc_mem_writel_ecr0(uint32_t val) "Write event count 1 %08x"
ecc_mem_writel_ecr1(uint32_t val) "Write event count 2 %08x"
ecc_mem_readl_mer(uint32_t ret) "Read memory enable %08x"
ecc_mem_readl_mdr(uint32_t ret) "Read memory delay %08x"
ecc_mem_readl_mfsr(uint32_t ret) "Read memory fault status %08x"
ecc_mem_readl_vcr(uint32_t ret) "Read slot configuration %08x"
ecc_mem_readl_mfar0(uint32_t ret) "Read memory fault address 0 %08x"
ecc_mem_readl_mfar1(uint32_t ret) "Read memory fault address 1 %08x"
ecc_mem_readl_dr(uint32_t ret) "Read diagnostic %08x"
ecc_mem_readl_ecr0(uint32_t ret) "Read event count 1 %08x"
ecc_mem_readl_ecr1(uint32_t ret) "Read event count 2 %08x"
ecc_diag_mem_writeb(uint64_t addr, uint32_t val) "Write diagnostic %"PRId64" = %02x"
ecc_diag_mem_readb(uint64_t addr, uint32_t ret) "Read diagnostic %"PRId64"= %02x"
# hw/lance.c
disable lance_mem_readw(uint64_t addr, uint32_t ret) "addr=%"PRIx64"val=0x%04x"
disable lance_mem_writew(uint64_t addr, uint32_t val) "addr=%"PRIx64"val=0x%04x"
lance_mem_readw(uint64_t addr, uint32_t ret) "addr=%"PRIx64"val=0x%04x"
lance_mem_writew(uint64_t addr, uint32_t val) "addr=%"PRIx64"val=0x%04x"
# hw/slavio_intctl.c
disable slavio_intctl_mem_readl(uint32_t cpu, uint64_t addr, uint32_t ret) "read cpu %d reg 0x%"PRIx64" = %x"
disable slavio_intctl_mem_writel(uint32_t cpu, uint64_t addr, uint32_t val) "write cpu %d reg 0x%"PRIx64" = %x"
disable slavio_intctl_mem_writel_clear(uint32_t cpu, uint32_t val, uint32_t intreg_pending) "Cleared cpu %d irq mask %x, curmask %x"
disable slavio_intctl_mem_writel_set(uint32_t cpu, uint32_t val, uint32_t intreg_pending) "Set cpu %d irq mask %x, curmask %x"
disable slavio_intctlm_mem_readl(uint64_t addr, uint32_t ret) "read system reg 0x%"PRIx64" = %x"
disable slavio_intctlm_mem_writel(uint64_t addr, uint32_t val) "write system reg 0x%"PRIx64" = %x"
disable slavio_intctlm_mem_writel_enable(uint32_t val, uint32_t intregm_disabled) "Enabled master irq mask %x, curmask %x"
disable slavio_intctlm_mem_writel_disable(uint32_t val, uint32_t intregm_disabled) "Disabled master irq mask %x, curmask %x"
disable slavio_intctlm_mem_writel_target(uint32_t cpu) "Set master irq cpu %d"
disable slavio_check_interrupts(uint32_t pending, uint32_t intregm_disabled) "pending %x disabled %x"
disable slavio_set_irq(uint32_t target_cpu, int irq, uint32_t pil, int level) "Set cpu %d irq %d -> pil %d level %d"
disable slavio_set_timer_irq_cpu(int cpu, int level) "Set cpu %d local timer level %d"
slavio_intctl_mem_readl(uint32_t cpu, uint64_t addr, uint32_t ret) "read cpu %d reg 0x%"PRIx64" = %x"
slavio_intctl_mem_writel(uint32_t cpu, uint64_t addr, uint32_t val) "write cpu %d reg 0x%"PRIx64" = %x"
slavio_intctl_mem_writel_clear(uint32_t cpu, uint32_t val, uint32_t intreg_pending) "Cleared cpu %d irq mask %x, curmask %x"
slavio_intctl_mem_writel_set(uint32_t cpu, uint32_t val, uint32_t intreg_pending) "Set cpu %d irq mask %x, curmask %x"
slavio_intctlm_mem_readl(uint64_t addr, uint32_t ret) "read system reg 0x%"PRIx64" = %x"
slavio_intctlm_mem_writel(uint64_t addr, uint32_t val) "write system reg 0x%"PRIx64" = %x"
slavio_intctlm_mem_writel_enable(uint32_t val, uint32_t intregm_disabled) "Enabled master irq mask %x, curmask %x"
slavio_intctlm_mem_writel_disable(uint32_t val, uint32_t intregm_disabled) "Disabled master irq mask %x, curmask %x"
slavio_intctlm_mem_writel_target(uint32_t cpu) "Set master irq cpu %d"
slavio_check_interrupts(uint32_t pending, uint32_t intregm_disabled) "pending %x disabled %x"
slavio_set_irq(uint32_t target_cpu, int irq, uint32_t pil, int level) "Set cpu %d irq %d -> pil %d level %d"
slavio_set_timer_irq_cpu(int cpu, int level) "Set cpu %d local timer level %d"
# hw/slavio_misc.c
disable slavio_misc_update_irq_raise(void) "Raise IRQ"
disable slavio_misc_update_irq_lower(void) "Lower IRQ"
disable slavio_set_power_fail(int power_failing, uint8_t config) "Power fail: %d, config: %d"
disable slavio_cfg_mem_writeb(uint32_t val) "Write config %02x"
disable slavio_cfg_mem_readb(uint32_t ret) "Read config %02x"
disable slavio_diag_mem_writeb(uint32_t val) "Write diag %02x"
disable slavio_diag_mem_readb(uint32_t ret) "Read diag %02x"
disable slavio_mdm_mem_writeb(uint32_t val) "Write modem control %02x"
disable slavio_mdm_mem_readb(uint32_t ret) "Read modem control %02x"
disable slavio_aux1_mem_writeb(uint32_t val) "Write aux1 %02x"
disable slavio_aux1_mem_readb(uint32_t ret) "Read aux1 %02x"
disable slavio_aux2_mem_writeb(uint32_t val) "Write aux2 %02x"
disable slavio_aux2_mem_readb(uint32_t ret) "Read aux2 %02x"
disable apc_mem_writeb(uint32_t val) "Write power management %02x"
disable apc_mem_readb(uint32_t ret) "Read power management %02x"
disable slavio_sysctrl_mem_writel(uint32_t val) "Write system control %08x"
disable slavio_sysctrl_mem_readl(uint32_t ret) "Read system control %08x"
disable slavio_led_mem_writew(uint32_t val) "Write diagnostic LED %04x"
disable slavio_led_mem_readw(uint32_t ret) "Read diagnostic LED %04x"
slavio_misc_update_irq_raise(void) "Raise IRQ"
slavio_misc_update_irq_lower(void) "Lower IRQ"
slavio_set_power_fail(int power_failing, uint8_t config) "Power fail: %d, config: %d"
slavio_cfg_mem_writeb(uint32_t val) "Write config %02x"
slavio_cfg_mem_readb(uint32_t ret) "Read config %02x"
slavio_diag_mem_writeb(uint32_t val) "Write diag %02x"
slavio_diag_mem_readb(uint32_t ret) "Read diag %02x"
slavio_mdm_mem_writeb(uint32_t val) "Write modem control %02x"
slavio_mdm_mem_readb(uint32_t ret) "Read modem control %02x"
slavio_aux1_mem_writeb(uint32_t val) "Write aux1 %02x"
slavio_aux1_mem_readb(uint32_t ret) "Read aux1 %02x"
slavio_aux2_mem_writeb(uint32_t val) "Write aux2 %02x"
slavio_aux2_mem_readb(uint32_t ret) "Read aux2 %02x"
apc_mem_writeb(uint32_t val) "Write power management %02x"
apc_mem_readb(uint32_t ret) "Read power management %02x"
slavio_sysctrl_mem_writel(uint32_t val) "Write system control %08x"
slavio_sysctrl_mem_readl(uint32_t ret) "Read system control %08x"
slavio_led_mem_writew(uint32_t val) "Write diagnostic LED %04x"
slavio_led_mem_readw(uint32_t ret) "Read diagnostic LED %04x"
# hw/slavio_timer.c
disable slavio_timer_get_out(uint64_t limit, uint32_t counthigh, uint32_t count) "limit %"PRIx64" count %x%08x"
disable slavio_timer_irq(uint32_t counthigh, uint32_t count) "callback: count %x%08x"
disable slavio_timer_mem_readl_invalid(uint64_t addr) "invalid read address %"PRIx64""
disable slavio_timer_mem_readl(uint64_t addr, uint32_t ret) "read %"PRIx64" = %08x"
disable slavio_timer_mem_writel(uint64_t addr, uint32_t val) "write %"PRIx64" = %08x"
disable slavio_timer_mem_writel_limit(unsigned int timer_index, uint64_t count) "processor %d user timer set to %016"PRIx64""
disable slavio_timer_mem_writel_counter_invalid(void) "not user timer"
disable slavio_timer_mem_writel_status_start(unsigned int timer_index) "processor %d user timer started"
disable slavio_timer_mem_writel_status_stop(unsigned int timer_index) "processor %d user timer stopped"
disable slavio_timer_mem_writel_mode_user(unsigned int timer_index) "processor %d changed from counter to user timer"
disable slavio_timer_mem_writel_mode_counter(unsigned int timer_index) "processor %d changed from user timer to counter"
disable slavio_timer_mem_writel_mode_invalid(void) "not system timer"
disable slavio_timer_mem_writel_invalid(uint64_t addr) "invalid write address %"PRIx64""
slavio_timer_get_out(uint64_t limit, uint32_t counthigh, uint32_t count) "limit %"PRIx64" count %x%08x"
slavio_timer_irq(uint32_t counthigh, uint32_t count) "callback: count %x%08x"
slavio_timer_mem_readl_invalid(uint64_t addr) "invalid read address %"PRIx64""
slavio_timer_mem_readl(uint64_t addr, uint32_t ret) "read %"PRIx64" = %08x"
slavio_timer_mem_writel(uint64_t addr, uint32_t val) "write %"PRIx64" = %08x"
slavio_timer_mem_writel_limit(unsigned int timer_index, uint64_t count) "processor %d user timer set to %016"PRIx64""
slavio_timer_mem_writel_counter_invalid(void) "not user timer"
slavio_timer_mem_writel_status_start(unsigned int timer_index) "processor %d user timer started"
slavio_timer_mem_writel_status_stop(unsigned int timer_index) "processor %d user timer stopped"
slavio_timer_mem_writel_mode_user(unsigned int timer_index) "processor %d changed from counter to user timer"
slavio_timer_mem_writel_mode_counter(unsigned int timer_index) "processor %d changed from user timer to counter"
slavio_timer_mem_writel_mode_invalid(void) "not system timer"
slavio_timer_mem_writel_invalid(uint64_t addr) "invalid write address %"PRIx64""
# hw/sparc32_dma.c
disable ledma_memory_read(uint64_t addr) "DMA read addr 0x%"PRIx64""
disable ledma_memory_write(uint64_t addr) "DMA write addr 0x%"PRIx64""
disable sparc32_dma_set_irq_raise(void) "Raise IRQ"
disable sparc32_dma_set_irq_lower(void) "Lower IRQ"
disable espdma_memory_read(uint32_t addr) "DMA read addr 0x%08x"
disable espdma_memory_write(uint32_t addr) "DMA write addr 0x%08x"
disable sparc32_dma_mem_readl(uint64_t addr, uint32_t ret) "read dmareg %"PRIx64": 0x%08x"
disable sparc32_dma_mem_writel(uint64_t addr, uint32_t old, uint32_t val) "write dmareg %"PRIx64": 0x%08x -> 0x%08x"
disable sparc32_dma_enable_raise(void) "Raise DMA enable"
disable sparc32_dma_enable_lower(void) "Lower DMA enable"
ledma_memory_read(uint64_t addr) "DMA read addr 0x%"PRIx64""
ledma_memory_write(uint64_t addr) "DMA write addr 0x%"PRIx64""
sparc32_dma_set_irq_raise(void) "Raise IRQ"
sparc32_dma_set_irq_lower(void) "Lower IRQ"
espdma_memory_read(uint32_t addr) "DMA read addr 0x%08x"
espdma_memory_write(uint32_t addr) "DMA write addr 0x%08x"
sparc32_dma_mem_readl(uint64_t addr, uint32_t ret) "read dmareg %"PRIx64": 0x%08x"
sparc32_dma_mem_writel(uint64_t addr, uint32_t old, uint32_t val) "write dmareg %"PRIx64": 0x%08x -> 0x%08x"
sparc32_dma_enable_raise(void) "Raise DMA enable"
sparc32_dma_enable_lower(void) "Lower DMA enable"
# hw/sun4m.c
disable sun4m_cpu_interrupt(unsigned int level) "Set CPU IRQ %d"
disable sun4m_cpu_reset_interrupt(unsigned int level) "Reset CPU IRQ %d"
disable sun4m_cpu_set_irq_raise(int level) "Raise CPU IRQ %d"
disable sun4m_cpu_set_irq_lower(int level) "Lower CPU IRQ %d"
sun4m_cpu_interrupt(unsigned int level) "Set CPU IRQ %d"
sun4m_cpu_reset_interrupt(unsigned int level) "Reset CPU IRQ %d"
sun4m_cpu_set_irq_raise(int level) "Raise CPU IRQ %d"
sun4m_cpu_set_irq_lower(int level) "Lower CPU IRQ %d"
# hw/sun4m_iommu.c
disable sun4m_iommu_mem_readl(uint64_t addr, uint32_t ret) "read reg[%"PRIx64"] = %x"
disable sun4m_iommu_mem_writel(uint64_t addr, uint32_t val) "write reg[%"PRIx64"] = %x"
disable sun4m_iommu_mem_writel_ctrl(uint64_t iostart) "iostart = %"PRIx64""
disable sun4m_iommu_mem_writel_tlbflush(uint32_t val) "tlb flush %x"
disable sun4m_iommu_mem_writel_pgflush(uint32_t val) "page flush %x"
disable sun4m_iommu_page_get_flags(uint64_t pa, uint64_t iopte, uint32_t ret) "get flags addr %"PRIx64" => pte %"PRIx64", *pte = %x"
disable sun4m_iommu_translate_pa(uint64_t addr, uint64_t pa, uint32_t iopte) "xlate dva %"PRIx64" => pa %"PRIx64" iopte = %x"
disable sun4m_iommu_bad_addr(uint64_t addr) "bad addr %"PRIx64""
sun4m_iommu_mem_readl(uint64_t addr, uint32_t ret) "read reg[%"PRIx64"] = %x"
sun4m_iommu_mem_writel(uint64_t addr, uint32_t val) "write reg[%"PRIx64"] = %x"
sun4m_iommu_mem_writel_ctrl(uint64_t iostart) "iostart = %"PRIx64""
sun4m_iommu_mem_writel_tlbflush(uint32_t val) "tlb flush %x"
sun4m_iommu_mem_writel_pgflush(uint32_t val) "page flush %x"
sun4m_iommu_page_get_flags(uint64_t pa, uint64_t iopte, uint32_t ret) "get flags addr %"PRIx64" => pte %"PRIx64", *pte = %x"
sun4m_iommu_translate_pa(uint64_t addr, uint64_t pa, uint32_t iopte) "xlate dva %"PRIx64" => pa %"PRIx64" iopte = %x"
sun4m_iommu_bad_addr(uint64_t addr) "bad addr %"PRIx64""
# hw/usb-ehci.c
disable usb_ehci_reset(void) "=== RESET ==="
disable usb_ehci_mmio_readl(uint32_t addr, const char *str, uint32_t val) "rd mmio %04x [%s] = %x"
disable usb_ehci_mmio_writel(uint32_t addr, const char *str, uint32_t val) "wr mmio %04x [%s] = %x"
disable usb_ehci_mmio_change(uint32_t addr, const char *str, uint32_t new, uint32_t old) "ch mmio %04x [%s] = %x (old: %x)"
disable usb_ehci_usbsts(const char *sts, int state) "usbsts %s %d"
disable usb_ehci_state(const char *schedule, const char *state) "%s schedule %s"
disable usb_ehci_qh_ptrs(void *q, uint32_t addr, uint32_t nxt, uint32_t c_qtd, uint32_t n_qtd, uint32_t a_qtd) "q %p - QH @ %08x: next %08x qtds %08x,%08x,%08x"
disable usb_ehci_qh_fields(uint32_t addr, int rl, int mplen, int eps, int ep, int devaddr) "QH @ %08x - rl %d, mplen %d, eps %d, ep %d, dev %d"
disable usb_ehci_qh_bits(uint32_t addr, int c, int h, int dtc, int i) "QH @ %08x - c %d, h %d, dtc %d, i %d"
disable usb_ehci_qtd_ptrs(void *q, uint32_t addr, uint32_t nxt, uint32_t altnext) "q %p - QTD @ %08x: next %08x altnext %08x"
disable usb_ehci_qtd_fields(uint32_t addr, int tbytes, int cpage, int cerr, int pid) "QTD @ %08x - tbytes %d, cpage %d, cerr %d, pid %d"
disable usb_ehci_qtd_bits(uint32_t addr, int ioc, int active, int halt, int babble, int xacterr) "QTD @ %08x - ioc %d, active %d, halt %d, babble %d, xacterr %d"
disable usb_ehci_itd(uint32_t addr, uint32_t nxt, uint32_t mplen, uint32_t mult, uint32_t ep, uint32_t devaddr) "ITD @ %08x: next %08x - mplen %d, mult %d, ep %d, dev %d"
disable usb_ehci_port_attach(uint32_t port, const char *device) "attach port #%d - %s"
disable usb_ehci_port_detach(uint32_t port) "detach port #%d"
disable usb_ehci_port_reset(uint32_t port, int enable) "reset port #%d - %d"
disable usb_ehci_data(int rw, uint32_t cpage, uint32_t offset, uint32_t addr, uint32_t len, uint32_t bufpos) "write %d, cpage %d, offset 0x%03x, addr 0x%08x, len %d, bufpos %d"
disable usb_ehci_queue_action(void *q, const char *action) "q %p: %s"
usb_ehci_reset(void) "=== RESET ==="
usb_ehci_mmio_readl(uint32_t addr, const char *str, uint32_t val) "rd mmio %04x [%s] = %x"
usb_ehci_mmio_writel(uint32_t addr, const char *str, uint32_t val) "wr mmio %04x [%s] = %x"
usb_ehci_mmio_change(uint32_t addr, const char *str, uint32_t new, uint32_t old) "ch mmio %04x [%s] = %x (old: %x)"
usb_ehci_usbsts(const char *sts, int state) "usbsts %s %d"
usb_ehci_state(const char *schedule, const char *state) "%s schedule %s"
usb_ehci_qh_ptrs(void *q, uint32_t addr, uint32_t nxt, uint32_t c_qtd, uint32_t n_qtd, uint32_t a_qtd) "q %p - QH @ %08x: next %08x qtds %08x,%08x,%08x"
usb_ehci_qh_fields(uint32_t addr, int rl, int mplen, int eps, int ep, int devaddr) "QH @ %08x - rl %d, mplen %d, eps %d, ep %d, dev %d"
usb_ehci_qh_bits(uint32_t addr, int c, int h, int dtc, int i) "QH @ %08x - c %d, h %d, dtc %d, i %d"
usb_ehci_qtd_ptrs(void *q, uint32_t addr, uint32_t nxt, uint32_t altnext) "q %p - QTD @ %08x: next %08x altnext %08x"
usb_ehci_qtd_fields(uint32_t addr, int tbytes, int cpage, int cerr, int pid) "QTD @ %08x - tbytes %d, cpage %d, cerr %d, pid %d"
usb_ehci_qtd_bits(uint32_t addr, int ioc, int active, int halt, int babble, int xacterr) "QTD @ %08x - ioc %d, active %d, halt %d, babble %d, xacterr %d"
usb_ehci_itd(uint32_t addr, uint32_t nxt, uint32_t mplen, uint32_t mult, uint32_t ep, uint32_t devaddr) "ITD @ %08x: next %08x - mplen %d, mult %d, ep %d, dev %d"
usb_ehci_port_attach(uint32_t port, const char *device) "attach port #%d - %s"
usb_ehci_port_detach(uint32_t port) "detach port #%d"
usb_ehci_port_reset(uint32_t port, int enable) "reset port #%d - %d"
usb_ehci_data(int rw, uint32_t cpage, uint32_t offset, uint32_t addr, uint32_t len, uint32_t bufpos) "write %d, cpage %d, offset 0x%03x, addr 0x%08x, len %d, bufpos %d"
usb_ehci_queue_action(void *q, const char *action) "q %p: %s"
# hw/usb-desc.c
disable usb_desc_device(int addr, int len, int ret) "dev %d query device, len %d, ret %d"
disable usb_desc_device_qualifier(int addr, int len, int ret) "dev %d query device qualifier, len %d, ret %d"
disable usb_desc_config(int addr, int index, int len, int ret) "dev %d query config %d, len %d, ret %d"
disable usb_desc_other_speed_config(int addr, int index, int len, int ret) "dev %d query config %d, len %d, ret %d"
disable usb_desc_string(int addr, int index, int len, int ret) "dev %d query string %d, len %d, ret %d"
disable usb_set_addr(int addr) "dev %d"
disable usb_set_config(int addr, int config, int ret) "dev %d, config %d, ret %d"
disable usb_clear_device_feature(int addr, int feature, int ret) "dev %d, feature %d, ret %d"
disable usb_set_device_feature(int addr, int feature, int ret) "dev %d, feature %d, ret %d"
usb_desc_device(int addr, int len, int ret) "dev %d query device, len %d, ret %d"
usb_desc_device_qualifier(int addr, int len, int ret) "dev %d query device qualifier, len %d, ret %d"
usb_desc_config(int addr, int index, int len, int ret) "dev %d query config %d, len %d, ret %d"
usb_desc_other_speed_config(int addr, int index, int len, int ret) "dev %d query config %d, len %d, ret %d"
usb_desc_string(int addr, int index, int len, int ret) "dev %d query string %d, len %d, ret %d"
usb_set_addr(int addr) "dev %d"
usb_set_config(int addr, int config, int ret) "dev %d, config %d, ret %d"
usb_clear_device_feature(int addr, int feature, int ret) "dev %d, feature %d, ret %d"
usb_set_device_feature(int addr, int feature, int ret) "dev %d, feature %d, ret %d"
# hw/scsi-bus.c
disable scsi_req_alloc(int target, int lun, int tag) "target %d lun %d tag %d"
disable scsi_req_data(int target, int lun, int tag, int len) "target %d lun %d tag %d len %d"
disable scsi_req_dequeue(int target, int lun, int tag) "target %d lun %d tag %d"
disable scsi_req_continue(int target, int lun, int tag) "target %d lun %d tag %d"
disable scsi_req_parsed(int target, int lun, int tag, int cmd, int mode, int xfer) "target %d lun %d tag %d command %d dir %d length %d"
disable scsi_req_parsed_lba(int target, int lun, int tag, int cmd, uint64_t lba) "target %d lun %d tag %d command %d lba %"PRIu64""
disable scsi_req_parse_bad(int target, int lun, int tag, int cmd) "target %d lun %d tag %d command %d"
disable scsi_req_build_sense(int target, int lun, int tag, int key, int asc, int ascq) "target %d lun %d tag %d key %#02x asc %#02x ascq %#02x"
disable scsi_report_luns(int target, int lun, int tag) "target %d lun %d tag %d"
disable scsi_inquiry(int target, int lun, int tag, int cdb1, int cdb2) "target %d lun %d tag %d page %#02x/%#02x"
disable scsi_test_unit_ready(int target, int lun, int tag) "target %d lun %d tag %d"
disable scsi_request_sense(int target, int lun, int tag) "target %d lun %d tag %d"
scsi_req_alloc(int target, int lun, int tag) "target %d lun %d tag %d"
scsi_req_data(int target, int lun, int tag, int len) "target %d lun %d tag %d len %d"
scsi_req_dequeue(int target, int lun, int tag) "target %d lun %d tag %d"
scsi_req_continue(int target, int lun, int tag) "target %d lun %d tag %d"
scsi_req_parsed(int target, int lun, int tag, int cmd, int mode, int xfer) "target %d lun %d tag %d command %d dir %d length %d"
scsi_req_parsed_lba(int target, int lun, int tag, int cmd, uint64_t lba) "target %d lun %d tag %d command %d lba %"PRIu64""
scsi_req_parse_bad(int target, int lun, int tag, int cmd) "target %d lun %d tag %d command %d"
scsi_req_build_sense(int target, int lun, int tag, int key, int asc, int ascq) "target %d lun %d tag %d key %#02x asc %#02x ascq %#02x"
scsi_report_luns(int target, int lun, int tag) "target %d lun %d tag %d"
scsi_inquiry(int target, int lun, int tag, int cdb1, int cdb2) "target %d lun %d tag %d page %#02x/%#02x"
scsi_test_unit_ready(int target, int lun, int tag) "target %d lun %d tag %d"
scsi_request_sense(int target, int lun, int tag) "target %d lun %d tag %d"
# vl.c
disable vm_state_notify(int running, int reason) "running %d reason %d"
vm_state_notify(int running, int reason) "running %d reason %d"
# block/qed-l2-cache.c
disable qed_alloc_l2_cache_entry(void *l2_cache, void *entry) "l2_cache %p entry %p"
disable qed_unref_l2_cache_entry(void *entry, int ref) "entry %p ref %d"
disable qed_find_l2_cache_entry(void *l2_cache, void *entry, uint64_t offset, int ref) "l2_cache %p entry %p offset %"PRIu64" ref %d"
qed_alloc_l2_cache_entry(void *l2_cache, void *entry) "l2_cache %p entry %p"
qed_unref_l2_cache_entry(void *entry, int ref) "entry %p ref %d"
qed_find_l2_cache_entry(void *l2_cache, void *entry, uint64_t offset, int ref) "l2_cache %p entry %p offset %"PRIu64" ref %d"
# block/qed-table.c
disable qed_read_table(void *s, uint64_t offset, void *table) "s %p offset %"PRIu64" table %p"
disable qed_read_table_cb(void *s, void *table, int ret) "s %p table %p ret %d"
disable qed_write_table(void *s, uint64_t offset, void *table, unsigned int index, unsigned int n) "s %p offset %"PRIu64" table %p index %u n %u"
disable qed_write_table_cb(void *s, void *table, int flush, int ret) "s %p table %p flush %d ret %d"
qed_read_table(void *s, uint64_t offset, void *table) "s %p offset %"PRIu64" table %p"
qed_read_table_cb(void *s, void *table, int ret) "s %p table %p ret %d"
qed_write_table(void *s, uint64_t offset, void *table, unsigned int index, unsigned int n) "s %p offset %"PRIu64" table %p index %u n %u"
qed_write_table_cb(void *s, void *table, int flush, int ret) "s %p table %p flush %d ret %d"
# block/qed.c
disable qed_need_check_timer_cb(void *s) "s %p"
disable qed_start_need_check_timer(void *s) "s %p"
disable qed_cancel_need_check_timer(void *s) "s %p"
disable qed_aio_complete(void *s, void *acb, int ret) "s %p acb %p ret %d"
disable qed_aio_setup(void *s, void *acb, int64_t sector_num, int nb_sectors, void *opaque, int is_write) "s %p acb %p sector_num %"PRId64" nb_sectors %d opaque %p is_write %d"
disable qed_aio_next_io(void *s, void *acb, int ret, uint64_t cur_pos) "s %p acb %p ret %d cur_pos %"PRIu64""
disable qed_aio_read_data(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu"
disable qed_aio_write_data(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu"
disable qed_aio_write_prefill(void *s, void *acb, uint64_t start, size_t len, uint64_t offset) "s %p acb %p start %"PRIu64" len %zu offset %"PRIu64""
disable qed_aio_write_postfill(void *s, void *acb, uint64_t start, size_t len, uint64_t offset) "s %p acb %p start %"PRIu64" len %zu offset %"PRIu64""
disable qed_aio_write_main(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu"
qed_need_check_timer_cb(void *s) "s %p"
qed_start_need_check_timer(void *s) "s %p"
qed_cancel_need_check_timer(void *s) "s %p"
qed_aio_complete(void *s, void *acb, int ret) "s %p acb %p ret %d"
qed_aio_setup(void *s, void *acb, int64_t sector_num, int nb_sectors, void *opaque, int is_write) "s %p acb %p sector_num %"PRId64" nb_sectors %d opaque %p is_write %d"
qed_aio_next_io(void *s, void *acb, int ret, uint64_t cur_pos) "s %p acb %p ret %d cur_pos %"PRIu64""
qed_aio_read_data(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu"
qed_aio_write_data(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu"
qed_aio_write_prefill(void *s, void *acb, uint64_t start, size_t len, uint64_t offset) "s %p acb %p start %"PRIu64" len %zu offset %"PRIu64""
qed_aio_write_postfill(void *s, void *acb, uint64_t start, size_t len, uint64_t offset) "s %p acb %p start %"PRIu64" len %zu offset %"PRIu64""
qed_aio_write_main(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu"
# hw/g364fb.c
disable g364fb_read(uint64_t addr, uint32_t val) "read addr=0x%"PRIx64": 0x%x"
disable g364fb_write(uint64_t addr, uint32_t new) "write addr=0x%"PRIx64": 0x%x"
g364fb_read(uint64_t addr, uint32_t val) "read addr=0x%"PRIx64": 0x%x"
g364fb_write(uint64_t addr, uint32_t new) "write addr=0x%"PRIx64": 0x%x"
# hw/grlib_gptimer.c
disable grlib_gptimer_enable(int id, uint32_t count) "timer:%d set count 0x%x and run"
disable grlib_gptimer_disabled(int id, uint32_t config) "timer:%d Timer disable config 0x%x"
disable grlib_gptimer_restart(int id, uint32_t reload) "timer:%d reload val: 0x%x"
disable grlib_gptimer_set_scaler(uint32_t scaler, uint32_t freq) "scaler:0x%x freq: 0x%x"
disable grlib_gptimer_hit(int id) "timer:%d HIT"
disable grlib_gptimer_readl(int id, uint64_t addr, uint32_t val) "timer:%d addr 0x%"PRIx64" 0x%x"
disable grlib_gptimer_writel(int id, uint64_t addr, uint32_t val) "timer:%d addr 0x%"PRIx64" 0x%x"
grlib_gptimer_enable(int id, uint32_t count) "timer:%d set count 0x%x and run"
grlib_gptimer_disabled(int id, uint32_t config) "timer:%d Timer disable config 0x%x"
grlib_gptimer_restart(int id, uint32_t reload) "timer:%d reload val: 0x%x"
grlib_gptimer_set_scaler(uint32_t scaler, uint32_t freq) "scaler:0x%x freq: 0x%x"
grlib_gptimer_hit(int id) "timer:%d HIT"
grlib_gptimer_readl(int id, uint64_t addr, uint32_t val) "timer:%d addr 0x%"PRIx64" 0x%x"
grlib_gptimer_writel(int id, uint64_t addr, uint32_t val) "timer:%d addr 0x%"PRIx64" 0x%x"
# hw/grlib_irqmp.c
disable grlib_irqmp_check_irqs(uint32_t pend, uint32_t force, uint32_t mask, uint32_t lvl1, uint32_t lvl2) "pend:0x%04x force:0x%04x mask:0x%04x lvl1:0x%04x lvl0:0x%04x\n"
disable grlib_irqmp_ack(int intno) "interrupt:%d"
disable grlib_irqmp_set_irq(int irq) "Raise CPU IRQ %d"
disable grlib_irqmp_readl_unknown(uint64_t addr) "addr 0x%"PRIx64""
disable grlib_irqmp_writel_unknown(uint64_t addr, uint32_t value) "addr 0x%"PRIx64" value 0x%x"
grlib_irqmp_check_irqs(uint32_t pend, uint32_t force, uint32_t mask, uint32_t lvl1, uint32_t lvl2) "pend:0x%04x force:0x%04x mask:0x%04x lvl1:0x%04x lvl0:0x%04x\n"
grlib_irqmp_ack(int intno) "interrupt:%d"
grlib_irqmp_set_irq(int irq) "Raise CPU IRQ %d"
grlib_irqmp_readl_unknown(uint64_t addr) "addr 0x%"PRIx64""
grlib_irqmp_writel_unknown(uint64_t addr, uint32_t value) "addr 0x%"PRIx64" value 0x%x"
# hw/grlib_apbuart.c
disable grlib_apbuart_event(int event) "event:%d"
disable grlib_apbuart_writel_unknown(uint64_t addr, uint32_t value) "addr 0x%"PRIx64" value 0x%x"
grlib_apbuart_event(int event) "event:%d"
grlib_apbuart_writel_unknown(uint64_t addr, uint32_t value) "addr 0x%"PRIx64" value 0x%x"
# hw/leon3.c
disable leon3_set_irq(int intno) "Set CPU IRQ %d"
disable leon3_reset_irq(int intno) "Reset CPU IRQ %d"
leon3_set_irq(int intno) "Set CPU IRQ %d"
leon3_reset_irq(int intno) "Reset CPU IRQ %d"
# spice-qemu-char.c
disable spice_vmc_write(ssize_t out, int len) "spice wrottn %zd of requested %d"
disable spice_vmc_read(int bytes, int len) "spice read %d of requested %d"
disable spice_vmc_register_interface(void *scd) "spice vmc registered interface %p"
disable spice_vmc_unregister_interface(void *scd) "spice vmc unregistered interface %p"
spice_vmc_write(ssize_t out, int len) "spice wrottn %zd of requested %d"
spice_vmc_read(int bytes, int len) "spice read %d of requested %d"
spice_vmc_register_interface(void *scd) "spice vmc registered interface %p"
spice_vmc_unregister_interface(void *scd) "spice vmc unregistered interface %p"
# hw/lm32_pic.c
disable lm32_pic_raise_irq(void) "Raise CPU interrupt"
disable lm32_pic_lower_irq(void) "Lower CPU interrupt"
disable lm32_pic_interrupt(int irq, int level) "Set IRQ%d %d"
disable lm32_pic_set_im(uint32_t im) "im 0x%08x"
disable lm32_pic_set_ip(uint32_t ip) "ip 0x%08x"
disable lm32_pic_get_im(uint32_t im) "im 0x%08x"
disable lm32_pic_get_ip(uint32_t ip) "ip 0x%08x"
lm32_pic_raise_irq(void) "Raise CPU interrupt"
lm32_pic_lower_irq(void) "Lower CPU interrupt"
lm32_pic_interrupt(int irq, int level) "Set IRQ%d %d"
lm32_pic_set_im(uint32_t im) "im 0x%08x"
lm32_pic_set_ip(uint32_t ip) "ip 0x%08x"
lm32_pic_get_im(uint32_t im) "im 0x%08x"
lm32_pic_get_ip(uint32_t ip) "ip 0x%08x"
# hw/lm32_juart.c
disable lm32_juart_get_jtx(uint32_t value) "jtx 0x%08x"
disable lm32_juart_set_jtx(uint32_t value) "jtx 0x%08x"
disable lm32_juart_get_jrx(uint32_t value) "jrx 0x%08x"
disable lm32_juart_set_jrx(uint32_t value) "jrx 0x%08x"
lm32_juart_get_jtx(uint32_t value) "jtx 0x%08x"
lm32_juart_set_jtx(uint32_t value) "jtx 0x%08x"
lm32_juart_get_jrx(uint32_t value) "jrx 0x%08x"
lm32_juart_set_jrx(uint32_t value) "jrx 0x%08x"
# hw/lm32_timer.c
disable lm32_timer_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
disable lm32_timer_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
disable lm32_timer_hit(void) "timer hit"
disable lm32_timer_irq_state(int level) "irq state %d"
lm32_timer_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
lm32_timer_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
lm32_timer_hit(void) "timer hit"
lm32_timer_irq_state(int level) "irq state %d"
# hw/lm32_uart.c
disable lm32_uart_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
disable lm32_uart_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
disable lm32_uart_irq_state(int level) "irq state %d"
lm32_uart_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
lm32_uart_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
lm32_uart_irq_state(int level) "irq state %d"
# hw/lm32_sys.c
disable lm32_sys_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
lm32_sys_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
# hw/milkymist-ac97.c
disable milkymist_ac97_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
disable milkymist_ac97_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
disable milkymist_ac97_pulse_irq_crrequest(void) "Pulse IRQ CR request"
disable milkymist_ac97_pulse_irq_crreply(void) "Pulse IRQ CR reply"
disable milkymist_ac97_pulse_irq_dmaw(void) "Pulse IRQ DMA write"
disable milkymist_ac97_pulse_irq_dmar(void) "Pulse IRQ DMA read"
disable milkymist_ac97_in_cb(int avail, uint32_t remaining) "avail %d remaining %u"
disable milkymist_ac97_in_cb_transferred(int transferred) "transferred %d"
disable milkymist_ac97_out_cb(int free, uint32_t remaining) "free %d remaining %u"
disable milkymist_ac97_out_cb_transferred(int transferred) "transferred %d"
milkymist_ac97_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
milkymist_ac97_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
milkymist_ac97_pulse_irq_crrequest(void) "Pulse IRQ CR request"
milkymist_ac97_pulse_irq_crreply(void) "Pulse IRQ CR reply"
milkymist_ac97_pulse_irq_dmaw(void) "Pulse IRQ DMA write"
milkymist_ac97_pulse_irq_dmar(void) "Pulse IRQ DMA read"
milkymist_ac97_in_cb(int avail, uint32_t remaining) "avail %d remaining %u"
milkymist_ac97_in_cb_transferred(int transferred) "transferred %d"
milkymist_ac97_out_cb(int free, uint32_t remaining) "free %d remaining %u"
milkymist_ac97_out_cb_transferred(int transferred) "transferred %d"
# hw/milkymist-hpdmc.c
disable milkymist_hpdmc_memory_read(uint32_t addr, uint32_t value) "addr=%08x value=%08x"
disable milkymist_hpdmc_memory_write(uint32_t addr, uint32_t value) "addr=%08x value=%08x"
milkymist_hpdmc_memory_read(uint32_t addr, uint32_t value) "addr=%08x value=%08x"
milkymist_hpdmc_memory_write(uint32_t addr, uint32_t value) "addr=%08x value=%08x"
# hw/milkymist-memcard.c
disable milkymist_memcard_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
disable milkymist_memcard_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
milkymist_memcard_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
milkymist_memcard_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
# hw/milkymist-minimac2.c
disable milkymist_minimac2_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
disable milkymist_minimac2_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
disable milkymist_minimac2_mdio_write(uint8_t phy_addr, uint8_t addr, uint16_t value) "phy_addr %02x addr %02x value %04x"
disable milkymist_minimac2_mdio_read(uint8_t phy_addr, uint8_t addr, uint16_t value) "phy_addr %02x addr %02x value %04x"
disable milkymist_minimac2_tx_frame(uint32_t length) "length %u"
disable milkymist_minimac2_rx_frame(const void *buf, uint32_t length) "buf %p length %u"
disable milkymist_minimac2_drop_rx_frame(const void *buf) "buf %p"
disable milkymist_minimac2_rx_transfer(const void *buf, uint32_t length) "buf %p length %d"
disable milkymist_minimac2_raise_irq_rx(void) "Raise IRQ RX"
disable milkymist_minimac2_lower_irq_rx(void) "Lower IRQ RX"
disable milkymist_minimac2_pulse_irq_tx(void) "Pulse IRQ TX"
milkymist_minimac2_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
milkymist_minimac2_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
milkymist_minimac2_mdio_write(uint8_t phy_addr, uint8_t addr, uint16_t value) "phy_addr %02x addr %02x value %04x"
milkymist_minimac2_mdio_read(uint8_t phy_addr, uint8_t addr, uint16_t value) "phy_addr %02x addr %02x value %04x"
milkymist_minimac2_tx_frame(uint32_t length) "length %u"
milkymist_minimac2_rx_frame(const void *buf, uint32_t length) "buf %p length %u"
milkymist_minimac2_drop_rx_frame(const void *buf) "buf %p"
milkymist_minimac2_rx_transfer(const void *buf, uint32_t length) "buf %p length %d"
milkymist_minimac2_raise_irq_rx(void) "Raise IRQ RX"
milkymist_minimac2_lower_irq_rx(void) "Lower IRQ RX"
milkymist_minimac2_pulse_irq_tx(void) "Pulse IRQ TX"
# hw/milkymist-pfpu.c
disable milkymist_pfpu_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
disable milkymist_pfpu_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
disable milkymist_pfpu_vectout(uint32_t a, uint32_t b, uint32_t dma_ptr) "a %08x b %08x dma_ptr %08x"
disable milkymist_pfpu_pulse_irq(void) "Pulse IRQ"
milkymist_pfpu_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
milkymist_pfpu_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
milkymist_pfpu_vectout(uint32_t a, uint32_t b, uint32_t dma_ptr) "a %08x b %08x dma_ptr %08x"
milkymist_pfpu_pulse_irq(void) "Pulse IRQ"
# hw/milkymist-softusb.c
disable milkymist_softusb_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
disable milkymist_softusb_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
disable milkymist_softusb_mevt(uint8_t m) "m %d"
disable milkymist_softusb_kevt(uint8_t m) "m %d"
disable milkymist_softusb_mouse_event(int dx, int dy, int dz, int bs) "dx %d dy %d dz %d bs %02x"
disable milkymist_softusb_pulse_irq(void) "Pulse IRQ"
milkymist_softusb_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
milkymist_softusb_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
milkymist_softusb_mevt(uint8_t m) "m %d"
milkymist_softusb_kevt(uint8_t m) "m %d"
milkymist_softusb_mouse_event(int dx, int dy, int dz, int bs) "dx %d dy %d dz %d bs %02x"
milkymist_softusb_pulse_irq(void) "Pulse IRQ"
# hw/milkymist-sysctl.c
disable milkymist_sysctl_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
disable milkymist_sysctl_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
disable milkymist_sysctl_icap_write(uint32_t value) "value %08x"
disable milkymist_sysctl_start_timer0(void) "Start timer0"
disable milkymist_sysctl_stop_timer0(void) "Stop timer0"
disable milkymist_sysctl_start_timer1(void) "Start timer1"
disable milkymist_sysctl_stop_timer1(void) "Stop timer1"
disable milkymist_sysctl_pulse_irq_timer0(void) "Pulse IRQ Timer0"
disable milkymist_sysctl_pulse_irq_timer1(void) "Pulse IRQ Timer1"
milkymist_sysctl_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
milkymist_sysctl_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
milkymist_sysctl_icap_write(uint32_t value) "value %08x"
milkymist_sysctl_start_timer0(void) "Start timer0"
milkymist_sysctl_stop_timer0(void) "Stop timer0"
milkymist_sysctl_start_timer1(void) "Start timer1"
milkymist_sysctl_stop_timer1(void) "Stop timer1"
milkymist_sysctl_pulse_irq_timer0(void) "Pulse IRQ Timer0"
milkymist_sysctl_pulse_irq_timer1(void) "Pulse IRQ Timer1"
# hw/milkymist-tmu2.c
disable milkymist_tmu2_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
disable milkymist_tmu2_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
disable milkymist_tmu2_start(void) "Start TMU"
disable milkymist_tmu2_pulse_irq(void) "Pulse IRQ"
milkymist_tmu2_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
milkymist_tmu2_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
milkymist_tmu2_start(void) "Start TMU"
milkymist_tmu2_pulse_irq(void) "Pulse IRQ"
# hw/milkymist-uart.c
disable milkymist_uart_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
disable milkymist_uart_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
disable milkymist_uart_pulse_irq_rx(void) "Pulse IRQ RX"
disable milkymist_uart_pulse_irq_tx(void) "Pulse IRQ TX"
milkymist_uart_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
milkymist_uart_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
milkymist_uart_pulse_irq_rx(void) "Pulse IRQ RX"
milkymist_uart_pulse_irq_tx(void) "Pulse IRQ TX"
# hw/milkymist-vgafb.c
disable milkymist_vgafb_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
disable milkymist_vgafb_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
milkymist_vgafb_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
milkymist_vgafb_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
# xen-all.c
disable xen_ram_alloc(unsigned long ram_addr, unsigned long size) "requested: %#lx, size %#lx"
disable xen_client_set_memory(uint64_t start_addr, unsigned long size, unsigned long phys_offset, bool log_dirty) "%#"PRIx64" size %#lx, offset %#lx, log_dirty %i"
xen_ram_alloc(unsigned long ram_addr, unsigned long size) "requested: %#lx, size %#lx"
xen_client_set_memory(uint64_t start_addr, unsigned long size, unsigned long phys_offset, bool log_dirty) "%#"PRIx64" size %#lx, offset %#lx, log_dirty %i"
# xen-mapcache.c
disable xen_map_cache(uint64_t phys_addr) "want %#"PRIx64""
disable xen_remap_bucket(uint64_t index) "index %#"PRIx64""
disable xen_map_cache_return(void* ptr) "%p"
disable xen_map_block(uint64_t phys_addr, uint64_t size) "%#"PRIx64", size %#"PRIx64""
disable xen_unmap_block(void* addr, unsigned long size) "%p, size %#lx"
xen_map_cache(uint64_t phys_addr) "want %#"PRIx64""
xen_remap_bucket(uint64_t index) "index %#"PRIx64""
xen_map_cache_return(void* ptr) "%p"
xen_map_block(uint64_t phys_addr, uint64_t size) "%#"PRIx64", size %#"PRIx64""
xen_unmap_block(void* addr, unsigned long size) "%p, size %#lx"
# exec.c
disable qemu_put_ram_ptr(void* addr) "%p"
qemu_put_ram_ptr(void* addr) "%p"
# hw/xen_platform.c
disable xen_platform_log(char *s) "xen platform: %s"
xen_platform_log(char *s) "xen platform: %s"
# qemu-coroutine.c
disable qemu_coroutine_enter(void *from, void *to, void *opaque) "from %p to %p opaque %p"
disable qemu_coroutine_yield(void *from, void *to) "from %p to %p"
disable qemu_coroutine_terminate(void *co) "self %p"
qemu_coroutine_enter(void *from, void *to, void *opaque) "from %p to %p opaque %p"
qemu_coroutine_yield(void *from, void *to) "from %p to %p"
qemu_coroutine_terminate(void *co) "self %p"
# qemu-coroutine-lock.c
disable qemu_co_queue_next_bh(void) ""
disable qemu_co_queue_next(void *next) "next %p"
disable qemu_co_mutex_lock_entry(void *mutex, void *self) "mutex %p self %p"
disable qemu_co_mutex_lock_return(void *mutex, void *self) "mutex %p self %p"
disable qemu_co_mutex_unlock_entry(void *mutex, void *self) "mutex %p self %p"
disable qemu_co_mutex_unlock_return(void *mutex, void *self) "mutex %p self %p"
qemu_co_queue_next_bh(void) ""
qemu_co_queue_next(void *next) "next %p"
qemu_co_mutex_lock_entry(void *mutex, void *self) "mutex %p self %p"
qemu_co_mutex_lock_return(void *mutex, void *self) "mutex %p self %p"
qemu_co_mutex_unlock_entry(void *mutex, void *self) "mutex %p self %p"
qemu_co_mutex_unlock_return(void *mutex, void *self) "mutex %p self %p"
# hw/escc.c
disable escc_put_queue(char channel, int b) "channel %c put: 0x%02x"
disable escc_get_queue(char channel, int val) "channel %c get 0x%02x"
disable escc_update_irq(int irq) "IRQ = %d"
disable escc_update_parameters(char channel, int speed, int parity, int data_bits, int stop_bits) "channel %c: speed=%d parity=%c data=%d stop=%d"
disable escc_mem_writeb_ctrl(char channel, uint32_t reg, uint32_t val) "Write channel %c, reg[%d] = %2.2x"
disable escc_mem_writeb_data(char channel, uint32_t val) "Write channel %c, ch %d"
disable escc_mem_readb_ctrl(char channel, uint32_t reg, uint8_t val) "Read channel %c, reg[%d] = %2.2x"
disable escc_mem_readb_data(char channel, uint32_t ret) "Read channel %c, ch %d"
disable escc_serial_receive_byte(char channel, int ch) "channel %c put ch %d"
disable escc_sunkbd_event_in(int ch) "Untranslated keycode %2.2x"
disable escc_sunkbd_event_out(int ch) "Translated keycode %2.2x"
disable escc_kbd_command(int val) "Command %d"
disable escc_sunmouse_event(int dx, int dy, int buttons_state) "dx=%d dy=%d buttons=%01x"
escc_put_queue(char channel, int b) "channel %c put: 0x%02x"
escc_get_queue(char channel, int val) "channel %c get 0x%02x"
escc_update_irq(int irq) "IRQ = %d"
escc_update_parameters(char channel, int speed, int parity, int data_bits, int stop_bits) "channel %c: speed=%d parity=%c data=%d stop=%d"
escc_mem_writeb_ctrl(char channel, uint32_t reg, uint32_t val) "Write channel %c, reg[%d] = %2.2x"
escc_mem_writeb_data(char channel, uint32_t val) "Write channel %c, ch %d"
escc_mem_readb_ctrl(char channel, uint32_t reg, uint8_t val) "Read channel %c, reg[%d] = %2.2x"
escc_mem_readb_data(char channel, uint32_t ret) "Read channel %c, ch %d"
escc_serial_receive_byte(char channel, int ch) "channel %c put ch %d"
escc_sunkbd_event_in(int ch) "Untranslated keycode %2.2x"
escc_sunkbd_event_out(int ch) "Translated keycode %2.2x"
escc_kbd_command(int val) "Command %d"
escc_sunmouse_event(int dx, int dy, int buttons_state) "dx=%d dy=%d buttons=%01x"

42
trace/control.c Normal file
View File

@ -0,0 +1,42 @@
/*
* Interface for configuring and controlling the state of tracing events.
*
* Copyright (C) 2011 Lluís Vilanova <vilanova@ac.upc.edu>
*
* This work is licensed under the terms of the GNU GPL, version 2. See
* the COPYING file in the top-level directory.
*/
#include "trace/control.h"
void trace_backend_init_events(const char *fname)
{
if (fname == NULL) {
return;
}
FILE *fp = fopen(fname, "r");
if (!fp) {
fprintf(stderr, "error: could not open trace events file '%s': %s\n",
fname, strerror(errno));
exit(1);
}
char line_buf[1024];
while (fgets(line_buf, sizeof(line_buf), fp)) {
size_t len = strlen(line_buf);
if (len > 1) { /* skip empty lines */
line_buf[len - 1] = '\0';
if (!trace_event_set_state(line_buf, true)) {
fprintf(stderr,
"error: trace event '%s' does not exist\n", line_buf);
exit(1);
}
}
}
if (fclose(fp) != 0) {
fprintf(stderr, "error: closing file '%s': %s\n",
fname, strerror(errno));
exit(1);
}
}

41
trace/control.h Normal file
View File

@ -0,0 +1,41 @@
/*
* Interface for configuring and controlling the state of tracing events.
*
* Copyright (C) 2011 Lluís Vilanova <vilanova@ac.upc.edu>
*
* This work is licensed under the terms of the GNU GPL, version 2. See
* the COPYING file in the top-level directory.
*/
#ifndef TRACE_CONTROL_H
#define TRACE_CONTROL_H
#include "qemu-common.h"
/** Print the state of all events. */
void trace_print_events(FILE *stream, fprintf_function stream_printf);
/** Set the state of an event.
*
* @return Whether the state changed.
*/
bool trace_event_set_state(const char *name, bool state);
/** Initialize the tracing backend.
*
* @events Name of file with events to be enabled at startup; may be NULL.
* Corresponds to commandline option "-trace events=...".
* @file Name of trace output file; may be NULL.
* Corresponds to commandline option "-trace file=...".
* @return Whether the backend could be successfully initialized.
*/
bool trace_backend_init(const char *events, const char *file);
/** Generic function to initialize the state of events.
*
* @fname Name of file with events to enable; may be NULL.
*/
void trace_backend_init_events(const char *fname);
#endif /* TRACE_CONTROL_H */

41
trace/default.c Normal file
View File

@ -0,0 +1,41 @@
/*
* Default implementation for backend initialization from commandline.
*
* Copyright (C) 2011 Lluís Vilanova <vilanova@ac.upc.edu>
*
* This work is licensed under the terms of the GNU GPL, version 2. See
* the COPYING file in the top-level directory.
*/
#include "trace/control.h"
void trace_print_events(FILE *stream, fprintf_function stream_printf)
{
fprintf(stderr, "warning: "
"cannot print the trace events with the current backend\n");
stream_printf(stream, "error: "
"operation not supported with the current backend\n");
}
bool trace_event_set_state(const char *name, bool state)
{
fprintf(stderr, "warning: "
"cannot set the state of a trace event with the current backend\n");
return false;
}
bool trace_backend_init(const char *events, const char *file)
{
if (events) {
fprintf(stderr, "error: -trace events=...: "
"option not supported by the selected tracing backend\n");
return false;
}
if (file) {
fprintf(stderr, "error: -trace file=...: "
"option not supported by the selected tracing backend\n");
return false;
}
return true;
}

27
simpletrace.c → trace/simple.c
View File

@ -16,6 +16,7 @@
#include <pthread.h>
#include "qemu-timer.h"
#include "trace.h"
#include "trace/control.h"
/** Trace file header event ID */
#define HEADER_EVENT_ID (~(uint64_t)0) /* avoids conflicting with TraceEventIDs */
@ -302,7 +303,12 @@ void st_print_trace(FILE *stream, int (*stream_printf)(FILE *stream, const char
}
}
void st_print_trace_events(FILE *stream, int (*stream_printf)(FILE *stream, const char *fmt, ...))
void st_flush_trace_buffer(void)
{
flush_trace_file(true);
}
void trace_print_events(FILE *stream, fprintf_function stream_printf)
{
unsigned int i;
@ -312,25 +318,20 @@ void st_print_trace_events(FILE *stream, int (*stream_printf)(FILE *stream, cons
}
}
bool st_change_trace_event_state(const char *name, bool enabled)
bool trace_event_set_state(const char *name, bool state)
{
unsigned int i;
for (i = 0; i < NR_TRACE_EVENTS; i++) {
if (!strcmp(trace_list[i].tp_name, name)) {
trace_list[i].state = enabled;
trace_list[i].state = state;
return true;
}
}
return false;
}
void st_flush_trace_buffer(void)
{
flush_trace_file(true);
}
bool st_init(const char *file)
bool trace_backend_init(const char *events, const char *file)
{
pthread_t thread;
pthread_attr_t attr;
@ -346,10 +347,12 @@ bool st_init(const char *file)
pthread_sigmask(SIG_SETMASK, &oldset, NULL);
if (ret != 0) {
return false;
fprintf(stderr, "warning: unable to initialize simple trace backend\n");
} else {
atexit(st_flush_trace_buffer);
trace_backend_init_events(events);
st_set_trace_file(file);
}
atexit(st_flush_trace_buffer);
st_set_trace_file(file);
return true;
}

16
simpletrace.h → trace/simple.h
View File

@ -8,14 +8,13 @@
*
*/
#ifndef SIMPLETRACE_H
#define SIMPLETRACE_H
#ifndef TRACE_SIMPLE_H
#define TRACE_SIMPLE_H
#include <stdint.h>
#include <stdbool.h>
#include <stdio.h>
#ifdef CONFIG_SIMPLE_TRACE
typedef uint64_t TraceEventID;
typedef struct {
@ -31,18 +30,9 @@ void trace4(TraceEventID event, uint64_t x1, uint64_t x2, uint64_t x3, uint64_t
void trace5(TraceEventID event, uint64_t x1, uint64_t x2, uint64_t x3, uint64_t x4, uint64_t x5);
void trace6(TraceEventID event, uint64_t x1, uint64_t x2, uint64_t x3, uint64_t x4, uint64_t x5, uint64_t x6);
void st_print_trace(FILE *stream, fprintf_function stream_printf);
void st_print_trace_events(FILE *stream, fprintf_function stream_printf);
bool st_change_trace_event_state(const char *tname, bool tstate);
void st_print_trace_file_status(FILE *stream, fprintf_function stream_printf);
void st_set_trace_file_enabled(bool enable);
bool st_set_trace_file(const char *file);
void st_flush_trace_buffer(void);
bool st_init(const char *file);
#else
static inline bool st_init(const char *file)
{
return true;
}
#endif /* !CONFIG_SIMPLE_TRACE */
#endif /* SIMPLETRACE_H */
#endif /* TRACE_SIMPLE_H */

37
trace/stderr.c Normal file
View File

@ -0,0 +1,37 @@
#include "trace.h"
#include "trace/control.h"
void trace_print_events(FILE *stream, fprintf_function stream_printf)
{
unsigned int i;
for (i = 0; i < NR_TRACE_EVENTS; i++) {
stream_printf(stream, "%s [Event ID %u] : state %u\n",
trace_list[i].tp_name, i, trace_list[i].state);
}
}
bool trace_event_set_state(const char *name, bool state)
{
unsigned int i;
for (i = 0; i < NR_TRACE_EVENTS; i++) {
if (!strcmp(trace_list[i].tp_name, name)) {
trace_list[i].state = state;
return true;
}
}
return false;
}
bool trace_backend_init(const char *events, const char *file)
{
if (file) {
fprintf(stderr, "error: -trace file=...: "
"option not supported by the selected tracing backend\n");
return false;
}
trace_backend_init_events(events);
return true;
}

11
trace/stderr.h Normal file
View File

@ -0,0 +1,11 @@
#ifndef TRACE_STDERR_H
#define TRACE_STDERR_H
typedef uint64_t TraceEventID;
typedef struct {
const char *tp_name;
bool state;
} TraceEvent;
#endif /* ! TRACE_STDERR_H */

19
vl.c
View File

@ -158,7 +158,7 @@ int main(int argc, char **argv)
#include "slirp/libslirp.h"
#include "trace.h"
#include "simpletrace.h"
#include "trace/control.h"
#include "qemu-queue.h"
#include "cpus.h"
#include "arch_init.h"
@ -2204,7 +2204,6 @@ int main(int argc, char **argv, char **envp)
int show_vnc_port = 0;
#endif
int defconfig = 1;
const char *trace_file = NULL;
const char *log_mask = NULL;
const char *log_file = NULL;
GMemVTable mem_trace = {
@ -2212,6 +2211,8 @@ int main(int argc, char **argv, char **envp)
.realloc = realloc_and_trace,
.free = free_and_trace,
};
const char *trace_events = NULL;
const char *trace_file = NULL;
atexit(qemu_run_exit_notifiers);
error_set_progname(argv[0]);
@ -3002,14 +3003,16 @@ int main(int argc, char **argv, char **envp)
}
xen_mode = XEN_ATTACH;
break;
#ifdef CONFIG_SIMPLE_TRACE
case QEMU_OPTION_trace:
{
opts = qemu_opts_parse(qemu_find_opts("trace"), optarg, 0);
if (opts) {
trace_file = qemu_opt_get(opts, "file");
if (!opts) {
exit(1);
}
trace_events = qemu_opt_get(opts, "events");
trace_file = qemu_opt_get(opts, "file");
break;
#endif
}
case QEMU_OPTION_readconfig:
{
int ret = qemu_read_config_file(optarg);
@ -3067,8 +3070,8 @@ int main(int argc, char **argv, char **envp)
set_cpu_log(log_mask);
}
if (!st_init(trace_file)) {
fprintf(stderr, "warning: unable to initialize simple trace backend\n");
if (!trace_backend_init(trace_events, trace_file)) {
exit(1);
}
/* If no data_dir is specified then try to find it relative to the