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qemu-e2k
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target: e2k: Move %br to %cr1_hi.

This commit is contained in:
Denis Drakhnia 2020-11-14 13:49:48 +02:00 committed by Denis Drakhnia
parent ed83debd31
commit 8a8985961e
6 changed files with 124 additions and 37 deletions
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14
target/e2k/cpu.c
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@ -75,12 +75,12 @@ static const struct e2k_def_t e2k_defs[] = {
static inline void cpu_dump_state_br(CPUE2KState *env, FILE *f, int flags)
{
uint32_t br = env->br;
int rbs = GET_FIELD(br, BR_RBS_OFF, BR_RBS_LEN);
int rsz = GET_FIELD(br, BR_RSZ_OFF, BR_RSZ_LEN);
int rcur = GET_FIELD(br, BR_RCUR_OFF, BR_RCUR_LEN);
int psz = GET_FIELD(br, BR_PSZ_OFF, BR_PSZ_LEN);
int pcur = GET_FIELD(br, BR_PCUR_OFF, BR_PCUR_LEN);
uint32_t br = GET_FIELD(env->cr1_hi, CR1_HI_BR_OFF, CR1_HI_BR_END);
int rbs = GET_FIELD(br, BR_RBS_OFF, BR_RBS_END);
int rsz = GET_FIELD(br, BR_RSZ_OFF, BR_RSZ_END);
int rcur = GET_FIELD(br, BR_RCUR_OFF, BR_RCUR_END);
int psz = GET_FIELD(br, BR_PSZ_OFF, BR_PSZ_END);
int pcur = GET_FIELD(br, BR_PCUR_OFF, BR_PCUR_END);
qemu_fprintf(f, "br %#x\n", br);
qemu_fprintf(f, " rbs %#x\n", rbs);
@ -100,6 +100,8 @@ void e2k_cpu_dump_state(CPUState *cs, FILE *f, int flags)
qemu_fprintf(f, "pregs: %016lx\n", env->pregs);
qemu_fprintf(f, "usd_hi: %016lx, usd_lo: %016lx\n",
env->usd_hi, env->usd_lo);
qemu_fprintf(f, "cr1_hi: %016lx, cr1_lo: %016lx\n",
env->cr1_hi, env->cr1_lo);
qemu_fprintf(f, "wbs: %d, wsz: %d\n", (int) env->wbs, (int) env->wsz);
cpu_dump_state_br(env, f, flags);
qemu_fprintf(f, "lsr: %016lx\n", env->lsr);

36
target/e2k/cpu.h
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@ -28,6 +28,38 @@ void e2k_tcg_initialize(void);
#define CTPR_IPD_OFF 59
#define CTPR_IPD_END 60
#define CR1_HI_BR_OFF 0
#define CR1_HI_BR_END 27
#define CR1_HI_BR_LEN (CR1_HI_BR_END - CR1_HI_BR_OFF + 1)
#define CR1_HI_WDBL_OFF 35
#define CR1_HI_WDBL_BIT (1UL << CR1_HI_WDBL_OFF)
#define CR1_HI_USSZ_OFF 36
#define CR1_HI_USSZ_END 63
#define CR1_HI_USSZ_LEN (CR1_HI_USSZ_END - CR1_HI_USSZ_OFF + 1)
#define CR1_LO_TR_OFF 0
#define CR1_LO_TR_END 14
#define CR1_LO_TR_LEN (CR1_LO_TR_END - CR1_LO_TR_OFF + 1)
#define CR1_LO_EIN_OFF 16
#define CR1_LO_EIN_END 23
#define CR1_LO_EIN_LEN (CR1_LO_EIN_END - CR1_LO_EIN_OFF + 1)
#define CR1_LO_SS_OFF 24
#define CR1_LO_SS_BIT (1UL << CR1_LO_SS_OFF)
#define CR1_LO_WFX_OFF 25
#define CR1_LO_WFX_BIT (1UL << CR1_LO_WFX_OFF)
#define CR1_LO_WPSZ_OFF 26
#define CR1_LO_WPSZ_END 32
#define CR1_LO_WPSZ_LEN (CR1_LO_WPSZ_END - CR1_LO_WPSZ_OFF + 1)
#define CR1_LO_WBS_OFF 33
#define CR1_LO_WBS_END 39
#define CR1_LO_WBS_LEN (CR1_LO_WBS_END - CR1_LO_WBS_OFF + 1)
#define CR1_LO_CUIR_OFF 40
#define CR1_LO_CUIR_END 56
#define CR1_LO_CUIR_LEN (CR1_LO_CUIR_END - CR1_LO_CUIR_OFF + 1)
#define CR1_LO_PSR_OFF 57
#define CR1_LO_PSR_END 63
#define CR1_LO_PSR_LEN (CR1_LO_PSR_END - CR1_LO_PSR_OFF + 1)
#define BR_RBS_OFF 0 /* based regs window offset */
#define BR_RBS_END 5
#define BR_RBS_LEN (BR_RBS_END - BR_RBS_OFF + 1)
@ -93,7 +125,9 @@ typedef struct CPUArchState {
uint32_t nfx; // TODO
uint32_t dbl; // TODO
uint32_t br; /* based regs and pregs window registers */
uint64_t cr1_hi;
uint64_t cr1_lo;
uint64_t lsr; /* loop status register */
uint32_t syscall_wbs;

5
target/e2k/translate.c
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@ -425,14 +425,15 @@ void e2k_tcg_initialize(void) {
{ &e2k_cs.wsz, offsetof(CPUE2KState, wsz), "wsz" },
{ &e2k_cs.nfx, offsetof(CPUE2KState, nfx), "nfx" },
{ &e2k_cs.dbl, offsetof(CPUE2KState, dbl), "dbl" },
{ &e2k_cs.br, offsetof(CPUE2KState, br), "br" },
{ &e2k_cs.syscall_wbs, offsetof(CPUE2KState, syscall_wbs), "syscall_wbs" },
};
static const struct { TCGv_i64 *ptr; int off; const char *name; } r64[] = {
{ &e2k_cs.pregs, offsetof(CPUE2KState, pregs), "pregs" },
{ &e2k_cs.usd_lo, offsetof(CPUE2KState, usd_lo), "usd.lo" },
{ &e2k_cs.usd_hi, offsetof(CPUE2KState, usd_hi), "usd.hi" },
{ &e2k_cs.usd_lo, offsetof(CPUE2KState, usd_lo), "usd.lo" },
{ &e2k_cs.cr1_hi, offsetof(CPUE2KState, cr1_hi), "cr1_hi" },
{ &e2k_cs.cr1_lo, offsetof(CPUE2KState, cr1_lo), "cr1_lo" },
{ &e2k_cs.lsr, offsetof(CPUE2KState, lsr), "lsr" },
};

26
target/e2k/translate.h
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@ -50,7 +50,8 @@ typedef struct CPUE2KStateTCG {
TCGv_i32 wsz;
TCGv_i32 nfx;
TCGv_i32 dbl;
TCGv_i32 br;
TCGv_i64 cr1_hi;
TCGv_i64 cr1_lo;
TCGv_i64 lsr;
TCGv_i32 syscall_wbs;
TCGv_ptr win_ptr;
@ -213,6 +214,29 @@ static inline void e2k_gen_set_field_i64(TCGv_i64 ret, TCGv_i64 val,
tcg_temp_free_i64(t0);
}
static inline void e2k_gen_get_br(TCGv_i32 ret)
{
TCGv_i64 t0 = tcg_temp_new_i64();
tcg_gen_extract_i64(t0, e2k_cs.cr1_hi, CR1_HI_BR_OFF, CR1_HI_BR_LEN);
tcg_gen_extrl_i64_i32(ret, t0);
tcg_temp_free_i64(t0);
}
static inline void e2k_gen_set_br(TCGv_i32 val)
{
TCGv_i64 t0 = tcg_temp_new_i64();
TCGv_i64 t1 = tcg_temp_new_i64();
tcg_gen_extu_i32_i64(t0, val);
tcg_gen_deposit_i64(t1, e2k_cs.cr1_hi, t0, CR1_HI_BR_OFF, CR1_HI_BR_LEN);
tcg_gen_mov_i64(e2k_cs.cr1_hi, t1);
tcg_temp_free_i64(t1);
tcg_temp_free_i64(t0);
}
static inline void e2k_gen_lcnt(TCGv_i64 ret)
{
tcg_gen_andi_i64(ret, e2k_cs.lsr, (1UL << 32) - 1);

60
target/e2k/translate/control.c
View File

@ -156,22 +156,32 @@ void e2k_win_commit(DisasContext *dc)
tcg_temp_free_i64(t0);
}
if (abp) {
TCGv_i32 t0 = tcg_temp_new_i32();
if (abp || abn) {
TCGv_i32 br = tcg_temp_new_i32();
gen_pcur_inc(t0, e2k_cs.br);
gen_movcond_flag_i32(e2k_cs.br, abp, cond, t0, e2k_cs.br);
e2k_gen_get_br(br);
tcg_temp_free_i32(t0);
}
if (abp) {
TCGv_i32 t0 = tcg_temp_new_i32();
if (abn) {
TCGv_i32 t0 = tcg_temp_new_i32();
gen_pcur_inc(t0, br);
gen_movcond_flag_i32(br, abp, cond, t0, br);
gen_rcur_inc(t0, e2k_cs.br);
gen_movcond_flag_i32(e2k_cs.br, abn, cond, t0, e2k_cs.br);
tcg_temp_free_i32(t0);
}
tcg_temp_free_i32(t0);
if (abn) {
TCGv_i32 t0 = tcg_temp_new_i32();
gen_rcur_inc(t0, br);
gen_movcond_flag_i32(br, abn, cond, t0, br);
tcg_temp_free_i32(t0);
}
e2k_gen_set_br(br);
tcg_temp_free_i32(br);
}
tcg_temp_free_i32(cond);
@ -407,16 +417,26 @@ static void gen_cs1(DisasContext *dc)
}
}
if (setbn) {
TCGv_i32 bn = tcg_const_i32(GET_FIELD(cs1, BR_BN_OFF, BR_BN_END));
tcg_gen_deposit_i32(e2k_cs.br, e2k_cs.br, bn, BR_BN_OFF, BR_BN_LEN);
tcg_temp_free_i32(bn);
}
if (setbn || setbp) {
TCGv_i32 br = tcg_temp_new_i32();
if (setbp) {
TCGv_i32 bp = tcg_const_i32(GET_FIELD(cs1, BR_PSZ_OFF, BR_PSZ_END));
tcg_gen_deposit_i32(e2k_cs.br, e2k_cs.br, bp, BR_BP_OFF, BR_BP_LEN);
tcg_temp_free_i32(bp);
e2k_gen_get_br(br);
if (setbn) {
TCGv_i32 bn = tcg_const_i32(GET_FIELD(cs1, BR_BN_OFF, BR_BN_END));
tcg_gen_deposit_i32(br, br, bn, BR_BN_OFF, BR_BN_LEN);
tcg_temp_free_i32(bn);
}
if (setbp) {
TCGv_i32 bp = tcg_const_i32(GET_FIELD(cs1, BR_PSZ_OFF, BR_PSZ_END));
tcg_gen_deposit_i32(br, br, bp, BR_BP_OFF, BR_BP_LEN);
tcg_temp_free_i32(bp);
}
e2k_gen_set_br(br);
tcg_temp_free_i32(br);
}
} else if (opc == SETEI) {
/* Verify that CS1.param.sft = CS1.param[27] is equal to zero as required

20
target/e2k/translate/state.c
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@ -7,14 +7,16 @@ static void gen_preg_offset(TCGv_i64 ret, int reg)
{
assert(reg < 32);
TCGv_i32 br = tcg_temp_new_i32();
TCGv_i32 pcur = tcg_temp_new_i32();
TCGv_i32 psz = tcg_temp_new_i32();
TCGv_i32 t0 = tcg_temp_new_i32();
TCGv_i32 t1 = tcg_temp_new_i32();
TCGv_i32 t2 = tcg_temp_new_i32();
tcg_gen_extract_i32(pcur, e2k_cs.br, BR_PCUR_OFF, BR_PCUR_LEN);
tcg_gen_extract_i32(psz, e2k_cs.br, BR_PSZ_OFF, BR_PSZ_LEN);
e2k_gen_get_br(br);
tcg_gen_extract_i32(pcur, br, BR_PCUR_OFF, BR_PCUR_LEN);
tcg_gen_extract_i32(psz, br, BR_PSZ_OFF, BR_PSZ_LEN);
tcg_gen_addi_i32(t0, pcur, reg);
e2k_gen_wrap_i32(t1, t0, psz);
tcg_gen_shli_i32(t2, t1, 1);
@ -25,6 +27,7 @@ static void gen_preg_offset(TCGv_i64 ret, int reg)
tcg_temp_free_i32(t0);
tcg_temp_free_i32(psz);
tcg_temp_free_i32(pcur);
tcg_temp_free_i32(br);
}
static void gen_preg_clear(TCGv_i64 ret, TCGv_i64 offset)
@ -130,12 +133,12 @@ void e2k_gen_store_wreg(int reg, TCGv_i64 val)
tcg_temp_free_ptr(ptr);
}
static inline void gen_breg_start(TCGv_i32 ret)
static inline void gen_breg_start(TCGv_i32 ret, TCGv_i32 br)
{
TCGv_i32 rbs = tcg_temp_new_i32();
TCGv_i32 t0 = tcg_temp_new_i32();
tcg_gen_extract_i32(rbs, e2k_cs.br, BR_RBS_OFF, BR_RBS_LEN);
tcg_gen_extract_i32(rbs, br, BR_RBS_OFF, BR_RBS_LEN);
tcg_gen_add_i32(t0, e2k_cs.wbs, rbs);
tcg_gen_shli_i32(ret, t0, 1);
@ -145,6 +148,7 @@ static inline void gen_breg_start(TCGv_i32 ret)
static inline void gen_breg_offset(TCGv_i32 ret, int reg)
{
TCGv_i32 br = tcg_temp_new_i32();
TCGv_i32 rcur = tcg_temp_new_i32();
TCGv_i32 rsz = tcg_temp_new_i32();
TCGv_i32 t0 = tcg_temp_new_i32();
@ -156,10 +160,11 @@ static inline void gen_breg_offset(TCGv_i32 ret, int reg)
TCGv_i32 t6 = tcg_temp_new_i32();
TCGv_i32 t7 = tcg_temp_new_i32();
e2k_gen_get_br(br);
/* TODO: exception: reg > (rsz * 2 + 2) */
/* t = (reg + rcur * 2) % (rsz * 2 + 2) */
tcg_gen_extract_i32(rcur, e2k_cs.br, BR_RCUR_OFF, BR_RCUR_LEN);
tcg_gen_extract_i32(rsz, e2k_cs.br, BR_RSZ_OFF, BR_RSZ_LEN);
tcg_gen_extract_i32(rcur, br, BR_RCUR_OFF, BR_RCUR_LEN);
tcg_gen_extract_i32(rsz, br, BR_RSZ_OFF, BR_RSZ_LEN);
tcg_gen_shli_i32(t0, rcur, 1);
tcg_gen_addi_i32(t1, t0, reg);
tcg_gen_addi_i32(t2, rsz, 1);
@ -168,7 +173,7 @@ static inline void gen_breg_offset(TCGv_i32 ret, int reg)
/* TODO: exceptioon: (reg + rbs * 2) > (wsz * 2) */
/* t = (t + wbs * 2 + rbs * 2) % 192 */
gen_breg_start(t5);
gen_breg_start(t5, br);
tcg_gen_add_i32(t6, t4, t5);
e2k_gen_wrapi_i32(t7, t6, WREGS_SIZE);
@ -185,6 +190,7 @@ static inline void gen_breg_offset(TCGv_i32 ret, int reg)
tcg_temp_free_i32(t0);
tcg_temp_free_i32(rsz);
tcg_temp_free_i32(rcur);
tcg_temp_free_i32(br);
}
static inline void gen_breg_ptr(TCGv_ptr ret, int reg)