ppc/pnv: add a PSI bridge model for POWER10
The POWER10 PSIHB controller is very similar to the one on POWER9. We should probably introduce a common PnvPsiXive object. The ESB page size should be changed to 64k when P10 support is ready. Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20191205184454.10722-5-clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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c5412b1d28
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27
hw/ppc/pnv.c
27
hw/ppc/pnv.c
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@ -647,9 +647,9 @@ static void pnv_ipmi_bt_init(ISABus *bus, IPMIBmc *bmc, uint32_t irq)
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static void pnv_chip_power10_pic_print_info(PnvChip *chip, Monitor *mon)
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static void pnv_chip_power10_pic_print_info(PnvChip *chip, Monitor *mon)
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{
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{
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/*
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Pnv10Chip *chip10 = PNV10_CHIP(chip);
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* No interrupt controller yet
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*/;
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pnv_psi_pic_print_info(&chip10->psi, mon);
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}
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}
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static void pnv_init(MachineState *machine)
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static void pnv_init(MachineState *machine)
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@ -1311,16 +1311,17 @@ static void pnv_chip_power9_class_init(ObjectClass *klass, void *data)
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static void pnv_chip_power10_instance_init(Object *obj)
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static void pnv_chip_power10_instance_init(Object *obj)
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{
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{
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/*
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Pnv10Chip *chip10 = PNV10_CHIP(obj);
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* No controllers yet
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*/
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object_initialize_child(obj, "psi", &chip10->psi, sizeof(chip10->psi),
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;
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TYPE_PNV10_PSI, &error_abort, NULL);
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}
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}
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static void pnv_chip_power10_realize(DeviceState *dev, Error **errp)
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static void pnv_chip_power10_realize(DeviceState *dev, Error **errp)
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{
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{
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PnvChipClass *pcc = PNV_CHIP_GET_CLASS(dev);
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PnvChipClass *pcc = PNV_CHIP_GET_CLASS(dev);
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PnvChip *chip = PNV_CHIP(dev);
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PnvChip *chip = PNV_CHIP(dev);
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Pnv10Chip *chip10 = PNV10_CHIP(dev);
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Error *local_err = NULL;
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Error *local_err = NULL;
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/* XSCOM bridge is first */
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/* XSCOM bridge is first */
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@ -1336,6 +1337,18 @@ static void pnv_chip_power10_realize(DeviceState *dev, Error **errp)
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error_propagate(errp, local_err);
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error_propagate(errp, local_err);
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return;
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return;
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}
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}
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/* Processor Service Interface (PSI) Host Bridge */
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object_property_set_int(OBJECT(&chip10->psi), PNV10_PSIHB_BASE(chip),
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"bar", &error_fatal);
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object_property_set_bool(OBJECT(&chip10->psi), true, "realized",
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&local_err);
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if (local_err) {
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error_propagate(errp, local_err);
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return;
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}
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pnv_xscom_add_subregion(chip, PNV10_XSCOM_PSIHB_BASE,
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&PNV_PSI(&chip10->psi)->xscom_regs);
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}
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}
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static void pnv_chip_power10_class_init(ObjectClass *klass, void *data)
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static void pnv_chip_power10_class_init(ObjectClass *klass, void *data)
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@ -538,6 +538,7 @@ static void pnv_psi_power8_realize(DeviceState *dev, Error **errp)
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static const char compat_p8[] = "ibm,power8-psihb-x\0ibm,psihb-x";
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static const char compat_p8[] = "ibm,power8-psihb-x\0ibm,psihb-x";
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static const char compat_p9[] = "ibm,power9-psihb-x\0ibm,psihb-x";
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static const char compat_p9[] = "ibm,power9-psihb-x\0ibm,psihb-x";
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static const char compat_p10[] = "ibm,power10-psihb-x\0ibm,psihb-x";
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static int pnv_psi_dt_xscom(PnvXScomInterface *dev, void *fdt, int xscom_offset)
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static int pnv_psi_dt_xscom(PnvXScomInterface *dev, void *fdt, int xscom_offset)
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{
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{
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@ -557,7 +558,10 @@ static int pnv_psi_dt_xscom(PnvXScomInterface *dev, void *fdt, int xscom_offset)
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_FDT(fdt_setprop(fdt, offset, "reg", reg, sizeof(reg)));
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_FDT(fdt_setprop(fdt, offset, "reg", reg, sizeof(reg)));
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_FDT(fdt_setprop_cell(fdt, offset, "#address-cells", 2));
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_FDT(fdt_setprop_cell(fdt, offset, "#address-cells", 2));
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_FDT(fdt_setprop_cell(fdt, offset, "#size-cells", 1));
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_FDT(fdt_setprop_cell(fdt, offset, "#size-cells", 1));
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if (ppc->chip_type == PNV_CHIP_POWER9) {
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if (ppc->chip_type == PNV_CHIP_POWER10) {
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_FDT(fdt_setprop(fdt, offset, "compatible", compat_p10,
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sizeof(compat_p10)));
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} else if (ppc->chip_type == PNV_CHIP_POWER9) {
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_FDT(fdt_setprop(fdt, offset, "compatible", compat_p9,
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_FDT(fdt_setprop(fdt, offset, "compatible", compat_p9,
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sizeof(compat_p9)));
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sizeof(compat_p9)));
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} else {
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} else {
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@ -909,6 +913,24 @@ static const TypeInfo pnv_psi_power9_info = {
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},
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},
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};
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};
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static void pnv_psi_power10_class_init(ObjectClass *klass, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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PnvPsiClass *ppc = PNV_PSI_CLASS(klass);
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dc->desc = "PowerNV PSI Controller POWER10";
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ppc->chip_type = PNV_CHIP_POWER10;
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ppc->xscom_pcba = PNV10_XSCOM_PSIHB_BASE;
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ppc->xscom_size = PNV10_XSCOM_PSIHB_SIZE;
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}
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static const TypeInfo pnv_psi_power10_info = {
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.name = TYPE_PNV10_PSI,
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.parent = TYPE_PNV9_PSI,
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.class_init = pnv_psi_power10_class_init,
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};
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static void pnv_psi_class_init(ObjectClass *klass, void *data)
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static void pnv_psi_class_init(ObjectClass *klass, void *data)
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{
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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DeviceClass *dc = DEVICE_CLASS(klass);
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@ -938,6 +960,7 @@ static void pnv_psi_register_types(void)
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type_register_static(&pnv_psi_info);
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type_register_static(&pnv_psi_info);
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type_register_static(&pnv_psi_power8_info);
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type_register_static(&pnv_psi_power8_info);
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type_register_static(&pnv_psi_power9_info);
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type_register_static(&pnv_psi_power9_info);
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type_register_static(&pnv_psi_power10_info);
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}
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}
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type_init(pnv_psi_register_types);
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type_init(pnv_psi_register_types);
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@ -112,6 +112,9 @@ typedef struct Pnv9Chip {
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typedef struct Pnv10Chip {
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typedef struct Pnv10Chip {
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/*< private >*/
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/*< private >*/
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PnvChip parent_obj;
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PnvChip parent_obj;
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/*< public >*/
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Pnv9Psi psi;
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} Pnv10Chip;
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} Pnv10Chip;
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typedef struct PnvChipClass {
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typedef struct PnvChipClass {
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@ -326,4 +329,10 @@ IPMIBmc *pnv_bmc_create(void);
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#define PNV10_XSCOM_SIZE 0x0000000400000000ull
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#define PNV10_XSCOM_SIZE 0x0000000400000000ull
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#define PNV10_XSCOM_BASE(chip) PNV10_CHIP_BASE(chip, 0x00603fc00000000ull)
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#define PNV10_XSCOM_BASE(chip) PNV10_CHIP_BASE(chip, 0x00603fc00000000ull)
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#define PNV10_PSIHB_ESB_SIZE 0x0000000000100000ull
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#define PNV10_PSIHB_ESB_BASE(chip) PNV10_CHIP_BASE(chip, 0x0006030202000000ull)
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#define PNV10_PSIHB_SIZE 0x0000000000100000ull
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#define PNV10_PSIHB_BASE(chip) PNV10_CHIP_BASE(chip, 0x0006030203000000ull)
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#endif /* PPC_PNV_H */
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#endif /* PPC_PNV_H */
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@ -69,6 +69,8 @@ typedef struct Pnv9Psi {
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XiveSource source;
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XiveSource source;
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} Pnv9Psi;
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} Pnv9Psi;
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#define TYPE_PNV10_PSI TYPE_PNV_PSI "-POWER10"
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#define PNV_PSI_CLASS(klass) \
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#define PNV_PSI_CLASS(klass) \
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OBJECT_CLASS_CHECK(PnvPsiClass, (klass), TYPE_PNV_PSI)
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OBJECT_CLASS_CHECK(PnvPsiClass, (klass), TYPE_PNV_PSI)
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#define PNV_PSI_GET_CLASS(obj) \
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#define PNV_PSI_GET_CLASS(obj) \
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@ -106,6 +106,9 @@ typedef struct PnvXScomInterfaceClass {
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((uint64_t) PNV10_XSCOM_EQ_BASE(core) | PNV10_XSCOM_EC(core & 0x3))
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((uint64_t) PNV10_XSCOM_EQ_BASE(core) | PNV10_XSCOM_EC(core & 0x3))
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#define PNV10_XSCOM_EC_SIZE 0x100000
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#define PNV10_XSCOM_EC_SIZE 0x100000
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#define PNV10_XSCOM_PSIHB_BASE 0x3011D00
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#define PNV10_XSCOM_PSIHB_SIZE 0x100
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extern void pnv_xscom_realize(PnvChip *chip, uint64_t size, Error **errp);
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extern void pnv_xscom_realize(PnvChip *chip, uint64_t size, Error **errp);
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extern int pnv_dt_xscom(PnvChip *chip, void *fdt, int offset);
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extern int pnv_dt_xscom(PnvChip *chip, void *fdt, int offset);
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