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qdev/isa: convert fdc. 

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Message-Id:
This commit is contained in:
Gerd Hoffmann 2009-07-31 12:30:18 +02:00 committed by Anthony Liguori
parent b399963830
commit 8baf73adf6
1 changed files with 76 additions and 41 deletions
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117
hw/fdc.c
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@ -471,7 +471,6 @@ enum {
#define FD_FORMAT_CMD(state) ((state) & FD_STATE_FORMAT) #define FD_FORMAT_CMD(state) ((state) & FD_STATE_FORMAT)
struct fdctrl_t { struct fdctrl_t {
SysBusDevice busdev;
/* Controller's identification */ /* Controller's identification */
uint8_t version; uint8_t version;
/* HW */ /* HW */
@ -513,6 +512,16 @@ struct fdctrl_t {
int reset_sensei; int reset_sensei;
}; };
typedef struct fdctrl_sysbus_t {
SysBusDevice busdev;
struct fdctrl_t state;
} fdctrl_sysbus_t;
typedef struct fdctrl_isabus_t {
ISADevice busdev;
struct fdctrl_t state;
} fdctrl_isabus_t;
static uint32_t fdctrl_read (void *opaque, uint32_t reg) static uint32_t fdctrl_read (void *opaque, uint32_t reg)
{ {
fdctrl_t *fdctrl = opaque; fdctrl_t *fdctrl = opaque;
@ -1866,27 +1875,26 @@ fdctrl_t *fdctrl_init (qemu_irq irq, int dma_chann, int mem_mapped,
target_phys_addr_t io_base, target_phys_addr_t io_base,
BlockDriverState **fds) BlockDriverState **fds)
{ {
DeviceState *dev;
SysBusDevice *s;
fdctrl_t *fdctrl; fdctrl_t *fdctrl;
dev = qdev_create(NULL, "fdc");
qdev_init(dev);
s = sysbus_from_qdev(dev);
sysbus_connect_irq(s, 0, irq);
fdctrl = FROM_SYSBUS(fdctrl_t, s);
if (mem_mapped) { if (mem_mapped) {
sysbus_mmio_map(s, 0, io_base); DeviceState *dev;
fdctrl_sysbus_t *sys;
dev = qdev_create(NULL, "sysbus-fdc");
qdev_init(dev);
sys = DO_UPCAST(fdctrl_sysbus_t, busdev.qdev, dev);
fdctrl = &sys->state;
sysbus_connect_irq(&sys->busdev, 0, irq);
sysbus_mmio_map(&sys->busdev, 0, io_base);
} else { } else {
register_ioport_read((uint32_t)io_base + 0x01, 5, 1, ISADevice *dev;
&fdctrl_read_port, fdctrl);
register_ioport_read((uint32_t)io_base + 0x07, 1, 1, dev = isa_create_simple("isa-fdc", io_base, 0);
&fdctrl_read_port, fdctrl); fdctrl = &(DO_UPCAST(fdctrl_isabus_t, busdev, dev)->state);
register_ioport_write((uint32_t)io_base + 0x01, 5, 1, isa_connect_irq(dev, 0, irq);
&fdctrl_write_port, fdctrl);
register_ioport_write((uint32_t)io_base + 0x07, 1, 1,
&fdctrl_write_port, fdctrl);
} }
fdctrl->dma_chann = dma_chann; fdctrl->dma_chann = dma_chann;
DMA_register_channel(dma_chann, &fdctrl_transfer_handler, fdctrl); DMA_register_channel(dma_chann, &fdctrl_transfer_handler, fdctrl);
@ -1899,18 +1907,17 @@ fdctrl_t *sun4m_fdctrl_init (qemu_irq irq, target_phys_addr_t io_base,
BlockDriverState **fds, qemu_irq *fdc_tc) BlockDriverState **fds, qemu_irq *fdc_tc)
{ {
DeviceState *dev; DeviceState *dev;
SysBusDevice *s; fdctrl_sysbus_t *sys;
fdctrl_t *fdctrl; fdctrl_t *fdctrl;
dev = qdev_create(NULL, "SUNW,fdtwo"); dev = qdev_create(NULL, "SUNW,fdtwo");
qdev_init(dev); qdev_init(dev);
s = sysbus_from_qdev(dev); sys = DO_UPCAST(fdctrl_sysbus_t, busdev.qdev, dev);
sysbus_connect_irq(s, 0, irq); fdctrl = &sys->state;
sysbus_mmio_map(s, 0, io_base); sysbus_connect_irq(&sys->busdev, 0, irq);
sysbus_mmio_map(&sys->busdev, 0, io_base);
*fdc_tc = qdev_get_gpio_in(dev, 0); *fdc_tc = qdev_get_gpio_in(dev, 0);
fdctrl = FROM_SYSBUS(fdctrl_t, s);
fdctrl->dma_chann = -1; fdctrl->dma_chann = -1;
fdctrl_connect_drives(fdctrl, fds); fdctrl_connect_drives(fdctrl, fds);
@ -1918,16 +1925,11 @@ fdctrl_t *sun4m_fdctrl_init (qemu_irq irq, target_phys_addr_t io_base,
return fdctrl; return fdctrl;
} }
static void fdctrl_init_common(SysBusDevice *dev, fdctrl_t *fdctrl, static void fdctrl_init_common(fdctrl_t *fdctrl)
int is_sun4m, int io)
{ {
int i, j; int i, j;
static int command_tables_inited = 0; static int command_tables_inited = 0;
sysbus_init_irq(dev, &fdctrl->irq);
qdev_init_gpio_in(&dev->qdev, fdctrl_handle_tc, 1);
sysbus_init_mmio(dev, 0x08, io);
/* Fill 'command_to_handler' lookup table */ /* Fill 'command_to_handler' lookup table */
if (!command_tables_inited) { if (!command_tables_inited) {
command_tables_inited = 1; command_tables_inited = 1;
@ -1947,47 +1949,80 @@ static void fdctrl_init_common(SysBusDevice *dev, fdctrl_t *fdctrl,
fdctrl->version = 0x90; /* Intel 82078 controller */ fdctrl->version = 0x90; /* Intel 82078 controller */
fdctrl->config = FD_CONFIG_EIS | FD_CONFIG_EFIFO; /* Implicit seek, polling & FIFO enabled */ fdctrl->config = FD_CONFIG_EIS | FD_CONFIG_EFIFO; /* Implicit seek, polling & FIFO enabled */
fdctrl->sun4m = is_sun4m;
fdctrl_external_reset(fdctrl); fdctrl_external_reset(fdctrl);
register_savevm("fdc", -1, 2, fdc_save, fdc_load, fdctrl); register_savevm("fdc", -1, 2, fdc_save, fdc_load, fdctrl);
qemu_register_reset(fdctrl_external_reset, fdctrl); qemu_register_reset(fdctrl_external_reset, fdctrl);
} }
static void fdc_init1(SysBusDevice *dev) static void isabus_fdc_init1(ISADevice *dev)
{ {
fdctrl_t *fdctrl = FROM_SYSBUS(fdctrl_t, dev); fdctrl_isabus_t *isa = DO_UPCAST(fdctrl_isabus_t, busdev, dev);
fdctrl_t *fdctrl = &isa->state;
register_ioport_read(isa->busdev.iobase[0] + 0x01, 5, 1,
&fdctrl_read_port, fdctrl);
register_ioport_read(isa->busdev.iobase[0] + 0x07, 1, 1,
&fdctrl_read_port, fdctrl);
register_ioport_write(isa->busdev.iobase[0] + 0x01, 5, 1,
&fdctrl_write_port, fdctrl);
register_ioport_write(isa->busdev.iobase[0] + 0x07, 1, 1,
&fdctrl_write_port, fdctrl);
isa_init_irq(&isa->busdev, &fdctrl->irq);
fdctrl_init_common(fdctrl);
}
static void sysbus_fdc_init1(SysBusDevice *dev)
{
fdctrl_t *fdctrl = &(FROM_SYSBUS(fdctrl_sysbus_t, dev)->state);
int io; int io;
io = cpu_register_io_memory(fdctrl_mem_read, fdctrl_mem_write, fdctrl); io = cpu_register_io_memory(fdctrl_mem_read, fdctrl_mem_write, fdctrl);
fdctrl_init_common(dev, fdctrl, 0, io); sysbus_init_mmio(dev, 0x08, io);
sysbus_init_irq(dev, &fdctrl->irq);
qdev_init_gpio_in(&dev->qdev, fdctrl_handle_tc, 1);
fdctrl_init_common(fdctrl);
} }
static void sun4m_fdc_init1(SysBusDevice *dev) static void sun4m_fdc_init1(SysBusDevice *dev)
{ {
fdctrl_t *fdctrl = FROM_SYSBUS(fdctrl_t, dev); fdctrl_t *fdctrl = &(FROM_SYSBUS(fdctrl_sysbus_t, dev)->state);
int io; int io;
io = cpu_register_io_memory(fdctrl_mem_read_strict, io = cpu_register_io_memory(fdctrl_mem_read_strict,
fdctrl_mem_write_strict, fdctrl); fdctrl_mem_write_strict, fdctrl);
fdctrl_init_common(dev, fdctrl, 1, io); sysbus_init_mmio(dev, 0x08, io);
sysbus_init_irq(dev, &fdctrl->irq);
qdev_init_gpio_in(&dev->qdev, fdctrl_handle_tc, 1);
fdctrl->sun4m = 1;
fdctrl_init_common(fdctrl);
} }
static SysBusDeviceInfo fdc_info = { static ISADeviceInfo isa_fdc_info = {
.init = fdc_init1, .init = isabus_fdc_init1,
.qdev.name = "fdc", .qdev.name = "isa-fdc",
.qdev.size = sizeof(fdctrl_t), .qdev.size = sizeof(fdctrl_isabus_t),
};
static SysBusDeviceInfo sysbus_fdc_info = {
.init = sysbus_fdc_init1,
.qdev.name = "sysbus-fdc",
.qdev.size = sizeof(fdctrl_sysbus_t),
}; };
static SysBusDeviceInfo sun4m_fdc_info = { static SysBusDeviceInfo sun4m_fdc_info = {
.init = sun4m_fdc_init1, .init = sun4m_fdc_init1,
.qdev.name = "SUNW,fdtwo", .qdev.name = "SUNW,fdtwo",
.qdev.size = sizeof(fdctrl_t), .qdev.size = sizeof(fdctrl_sysbus_t),
}; };
static void fdc_register_devices(void) static void fdc_register_devices(void)
{ {
sysbus_register_withprop(&fdc_info); isa_qdev_register(&isa_fdc_info);
sysbus_register_withprop(&sysbus_fdc_info);
sysbus_register_withprop(&sun4m_fdc_info); sysbus_register_withprop(&sun4m_fdc_info);
} }