From 8c78e941dda9bdf927679a504260ce3863f01f46 Mon Sep 17 00:00:00 2001 From: Alibek Omarov Date: Thu, 15 Oct 2020 17:08:01 +0300 Subject: [PATCH] target: e2k: add cpu definitions --- configs/targets/e2k-linux-user.mak | 2 - linux-user/e2k/signal.c | 98 ++++++++++++++++++++++++++++++ linux-user/e2k/target_syscall.h | 1 - target/e2k/cpu-qom.h | 47 ++++++++++++++ target/e2k/cpu.h | 44 ++++++++++++++ 5 files changed, 189 insertions(+), 3 deletions(-) create mode 100644 linux-user/e2k/signal.c create mode 100644 target/e2k/cpu-qom.h create mode 100644 target/e2k/cpu.h diff --git a/configs/targets/e2k-linux-user.mak b/configs/targets/e2k-linux-user.mak index 75cfd9f174..cc721119fd 100644 --- a/configs/targets/e2k-linux-user.mak +++ b/configs/targets/e2k-linux-user.mak @@ -1,3 +1 @@ TARGET_ARCH=e2k -TARGET_SYSTBL_ABI=common -TARGET_SYSTBL=syscall_64.tbl diff --git a/linux-user/e2k/signal.c b/linux-user/e2k/signal.c new file mode 100644 index 0000000000..6a641d06ba --- /dev/null +++ b/linux-user/e2k/signal.c @@ -0,0 +1,98 @@ +/* + * Emulation of Linux signals + * + * Copyright (c) 2003 Fabrice Bellard + * Copyright (c) 2020 Alibek Omarov + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see . + */ +#include "qemu/osdep.h" +#include "qemu.h" +#include "user-internals.h" +#include "signal-common.h" +#include "linux-user/trace.h" + +#define MAX_TC_SIZE 10 + +#define TIR_NUM 19 +#define DAM_ENTRIES_NUM 32 +#define SBBP_ENTRIES_NUM 32 + +/* from user.h !!! */ +#define MLT_NUM (16 * 3) /* common for E3M and E3S */ + +struct target_sigcontext { + abi_ulong cr0_lo; + abi_ulong cr0_hi; + abi_ulong cr1_lo; + abi_ulong cr1_hi; + abi_ulong sbr; /* 21 Stack base register: top of */ + /* local data (user) stack */ + abi_ulong usd_lo; /* 22 Local data (user) stack */ + abi_ulong usd_hi; /* 23 descriptor: base & size */ + abi_ulong psp_lo; /* 24 Procedure stack pointer: */ + abi_ulong psp_hi; /* 25 base & index & size */ + abi_ulong pcsp_lo; /* 26 Procedure chain stack */ + abi_ulong pcsp_hi; /* 27 pointer: base & index & size */ +/* + * additional part (for binary compiler) + */ + uint8_t bincomp_padding[sizeof(abi_ulong)*184 + 10]; + +#if 0 + abi_ulong rpr_hi; + abi_ulong rpr_lo; + + abi_ulong nr_TIRs; + abi_ulong tir_lo[TIR_NUM]; + abi_ulong tir_hi[TIR_NUM]; + abi_ulong trap_cell_addr[MAX_TC_SIZE]; + abi_ulong trap_cell_val[MAX_TC_SIZE]; + uint8_t trap_cell_tag[MAX_TC_SIZE]; + abi_ulong trap_cell_info[MAX_TC_SIZE]; + + abi_ulong dam[DAM_ENTRIES_NUM]; + + abi_ulong sbbp[SBBP_ENTRIES_NUM]; + + abi_ulong mlt[MLT_NUM]; + + abi_ulong upsr; +#endif +}; + +#define NF_ALIGNEDSZ (((sizeof(struct target_signal_frame) + 7) & (~7))) + +void setup_frame(int sig, struct target_sigaction *ka, + target_sigset_t *set, CPUE2KState *env) +{ +} + +void setup_rt_frame(int sig, struct target_sigaction *ka, + target_siginfo_t *info, + target_sigset_t *set, CPUE2KState *env) +{ + qemu_log_mask(LOG_UNIMP, "setup_rt_frame: not implemented\n"); +} + +long do_sigreturn(CPUE2KState *env) +{ +} + +long do_rt_sigreturn(CPUE2KState *env) +{ + trace_user_do_rt_sigreturn(env, 0); + qemu_log_mask(LOG_UNIMP, "do_rt_sigreturn: not implemented\n"); + return -TARGET_ENOSYS; +} diff --git a/linux-user/e2k/target_syscall.h b/linux-user/e2k/target_syscall.h index 9d65cefa12..c9cfacab31 100644 --- a/linux-user/e2k/target_syscall.h +++ b/linux-user/e2k/target_syscall.h @@ -20,7 +20,6 @@ typedef uint64_t e2k_greg_t; // double word struct target_pt_regs { - /* special registers */ uint64_t wd; // Current window descriptor (WD) diff --git a/target/e2k/cpu-qom.h b/target/e2k/cpu-qom.h new file mode 100644 index 0000000000..1d0065e07c --- /dev/null +++ b/target/e2k/cpu-qom.h @@ -0,0 +1,47 @@ +/* + * QEMU E2K CPU + * + * Copyright (c) 2012 SUSE LINUX Products GmbH + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2.1 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see + * + */ +#ifndef QEMU_E2K_CPU_QOM_H +#define QEMU_E2K_CPU_QOM_H + +#include "hw/core/cpu.h" +#include "qom/object.h" + +#define TYPE_E2K_CPU "e2k-cpu" + +OBJECT_DECLARE_CPU_TYPE(E2KCPU, E2KCPUClass, E2K_CPU) + +/** + * E2KCPUClass: + * @parent_realize: The parent class' realize handler. + * @parent_reset: The parent class' reset handler. + * + * A E2K CPU model. + */ +struct E2KCPUClass { + /*< private >*/ + CPUClass parent_class; + /*< public >*/ + + DeviceRealize parent_realize; + DeviceReset parent_reset; +}; + + +#endif diff --git a/target/e2k/cpu.h b/target/e2k/cpu.h new file mode 100644 index 0000000000..d9496229c1 --- /dev/null +++ b/target/e2k/cpu.h @@ -0,0 +1,44 @@ +#ifndef E2K_CPU_H +#define E2K_CPU_H + +#include "qemu/bswap.h" +#include "cpu-qom.h" +#include "exec/cpu-defs.h" + +struct CPUE2KState { + + /* register file */ + uint64_t gregs[32]; /* general registers */ + uint64_t pregs[224]; /* procedure regs, access through wreg */ + + /* control registers */ + uint64_t ctpr1; // Control Transfer Preparation Register (CTPR) + uint64_t ctpr2; + uint64_t ctpr3; + + /* special registers */ + uint64_t *wreg; /* pointer to current window */ + uint32_t br; /* base register offset, max 128 */ + uint64_t ip, nip; /* instruction address, next instruction address */ + + uint32_t pfpfr; // Packed Floating Point Flag Register (PFPFR) + uint32_t fpcr; // Floating point control register (FPCR) + uint32_t fpsr; // Floating point state register (FPSR) +}; + +/** + * E2KCPU: + * @env: #CPUE2KState + * + * An Elbrus CPU. + */ +struct E2KCPU { + /*< private >*/ + CPUState parent_obj; + /*< public >*/ + + CPUNegativeOffsetState neg; + CPUE2KState env; +}; + +#endif