Fix local register cache handling.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4495 c046a42c-6fe2-441c-8c8c-71466251a162
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@ -504,7 +504,7 @@ static inline void gen_op_store_gpr_T1(int reg)
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/* Moves to/from shadow registers */
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/* Moves to/from shadow registers */
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static inline void gen_op_load_srsgpr_T0(int reg)
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static inline void gen_op_load_srsgpr_T0(int reg)
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{
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{
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int r_tmp = new_tmp();
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TCGv r_tmp = new_tmp();
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tcg_gen_ld_i32(r_tmp, cpu_env, offsetof(CPUState, CP0_SRSCtl));
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tcg_gen_ld_i32(r_tmp, cpu_env, offsetof(CPUState, CP0_SRSCtl));
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tcg_gen_shri_i32(r_tmp, r_tmp, CP0SRSCtl_PSS);
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tcg_gen_shri_i32(r_tmp, r_tmp, CP0SRSCtl_PSS);
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@ -518,7 +518,7 @@ static inline void gen_op_load_srsgpr_T0(int reg)
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static inline void gen_op_store_srsgpr_T0(int reg)
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static inline void gen_op_store_srsgpr_T0(int reg)
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{
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{
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int r_tmp = new_tmp();
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TCGv r_tmp = new_tmp();
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tcg_gen_ld_i32(r_tmp, cpu_env, offsetof(CPUState, CP0_SRSCtl));
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tcg_gen_ld_i32(r_tmp, cpu_env, offsetof(CPUState, CP0_SRSCtl));
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tcg_gen_shri_i32(r_tmp, r_tmp, CP0SRSCtl_PSS);
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tcg_gen_shri_i32(r_tmp, r_tmp, CP0SRSCtl_PSS);
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@ -1016,7 +1016,7 @@ OP_LD_ATOMIC(lld,ld64);
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#define OP_ST_ATOMIC(insn,fname,almask) \
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#define OP_ST_ATOMIC(insn,fname,almask) \
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void inline op_ldst_##insn(DisasContext *ctx) \
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void inline op_ldst_##insn(DisasContext *ctx) \
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{ \
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{ \
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int r_tmp = tcg_temp_new(TCG_TYPE_TL); \
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TCGv r_tmp = tcg_temp_new(TCG_TYPE_TL); \
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int l1 = gen_new_label(); \
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int l1 = gen_new_label(); \
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int l2 = gen_new_label(); \
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int l2 = gen_new_label(); \
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int l3 = gen_new_label(); \
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int l3 = gen_new_label(); \
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@ -1956,7 +1956,7 @@ static inline void tcg_gen_set_bcond(void)
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static inline void tcg_gen_jnz_bcond(int label)
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static inline void tcg_gen_jnz_bcond(int label)
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{
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{
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int r_tmp = tcg_temp_new(TCG_TYPE_TL);
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TCGv r_tmp = tcg_temp_new(TCG_TYPE_TL);
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tcg_gen_ld_tl(r_tmp, cpu_env, offsetof(CPUState, bcond));
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tcg_gen_ld_tl(r_tmp, cpu_env, offsetof(CPUState, bcond));
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tcg_gen_brcond_tl(TCG_COND_NE, r_tmp, tcg_const_tl(0), label);
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tcg_gen_brcond_tl(TCG_COND_NE, r_tmp, tcg_const_tl(0), label);
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@ -6834,6 +6834,9 @@ gen_intermediate_code_internal (CPUState *env, TranslationBlock *tb,
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if (search_pc && loglevel)
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if (search_pc && loglevel)
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fprintf (logfile, "search pc %d\n", search_pc);
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fprintf (logfile, "search pc %d\n", search_pc);
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num_temps = 0;
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memset(temps, 0, sizeof(temps));
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pc_start = tb->pc;
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pc_start = tb->pc;
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gen_opc_end = gen_opc_buf + OPC_MAX_SIZE;
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gen_opc_end = gen_opc_buf + OPC_MAX_SIZE;
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ctx.pc = pc_start;
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ctx.pc = pc_start;
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@ -6888,6 +6891,12 @@ gen_intermediate_code_internal (CPUState *env, TranslationBlock *tb,
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}
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}
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ctx.opcode = ldl_code(ctx.pc);
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ctx.opcode = ldl_code(ctx.pc);
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decode_opc(env, &ctx);
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decode_opc(env, &ctx);
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if (num_temps) {
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fprintf(stderr,
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"Internal resource leak before " TARGET_FMT_lx "\n",
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ctx.pc);
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num_temps = 0;
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}
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ctx.pc += 4;
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ctx.pc += 4;
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if (env->singlestep_enabled)
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if (env->singlestep_enabled)
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