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target/riscv: Add Zaamo and Zalrsc extension infrastructure

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These extensions represent the atomic operations from A (Zaamo) and the
Load-Reserved/Store-Conditional operations from A (Zalrsc)

Signed-off-by: Rob Bradford <rbradford@rivosinc.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Message-ID: <20240123111030.15074-2-rbradford@rivosinc.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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Rob Bradford 2024-01-23 11:10:28 +00:00 committed by Alistair Francis
parent 5fb20f7600
commit 8caeda5bf5
1 changed files with 2 additions and 0 deletions
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target/riscv/cpu_cfg.h
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@ -78,7 +78,9 @@ struct RISCVCPUConfig {
bool ext_svnapot;
bool ext_svpbmt;
bool ext_zdinx;
bool ext_zaamo;
bool ext_zacas;
bool ext_zalrsc;
bool ext_zawrs;
bool ext_zfa;
bool ext_zfbfmin;