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tcg: Allow target-specific implementation of EQV. 

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
This commit is contained in:
Richard Henderson 2010-03-19 13:02:02 -07:00 committed by Aurelien Jarno
parent a10f9f4f0c
commit 8d625cf1d1
11 changed files with 30 additions and 1 deletions
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2
tcg/README
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@ -213,7 +213,7 @@ t0=t1&~t2
* eqv_i32/i64 t0, t1, t2
t0=~(t1^t2)
t0=~(t1^t2), or equivalently, t0=t1^~t2
* nand_i32/i64 t0, t1, t2

1
tcg/arm/tcg-target.h
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@ -67,6 +67,7 @@ enum {
// #define TCG_TARGET_HAS_rot_i32
#define TCG_TARGET_HAS_andc_i32
// #define TCG_TARGET_HAS_orc_i32
// #define TCG_TARGET_HAS_eqv_i32
#define TCG_TARGET_HAS_GUEST_BASE

1
tcg/i386/tcg-target.h
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@ -57,6 +57,7 @@ enum {
#define TCG_TARGET_HAS_not_i32
// #define TCG_TARGET_HAS_andc_i32
// #define TCG_TARGET_HAS_orc_i32
// #define TCG_TARGET_HAS_eqv_i32
#define TCG_TARGET_HAS_GUEST_BASE

1
tcg/mips/tcg-target.h
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@ -87,6 +87,7 @@ enum {
#undef TCG_TARGET_HAS_bswap16_i32
#undef TCG_TARGET_HAS_andc_i32
#undef TCG_TARGET_HAS_orc_i32
#undef TCG_TARGET_HAS_eqv_i32
/* optional instructions automatically implemented */
#undef TCG_TARGET_HAS_neg_i32 /* sub rd, zero, rt */

1
tcg/ppc/tcg-target.h
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@ -89,6 +89,7 @@ enum {
#define TCG_TARGET_HAS_neg_i32
#define TCG_TARGET_HAS_andc_i32
#define TCG_TARGET_HAS_orc_i32
/* #define TCG_TARGET_HAS_eqv_i32 */
#define TCG_AREG0 TCG_REG_R27

2
tcg/ppc64/tcg-target.h
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@ -80,6 +80,7 @@ enum {
#define TCG_TARGET_HAS_neg_i32
/* #define TCG_TARGET_HAS_andc_i32 */
/* #define TCG_TARGET_HAS_orc_i32 */
/* #define TCG_TARGET_HAS_eqv_i32 */
#define TCG_TARGET_HAS_div_i64
/* #define TCG_TARGET_HAS_rot_i64 */
@ -96,6 +97,7 @@ enum {
#define TCG_TARGET_HAS_neg_i64
/* #define TCG_TARGET_HAS_andc_i64 */
/* #define TCG_TARGET_HAS_orc_i64 */
/* #define TCG_TARGET_HAS_eqv_i64 */
#define TCG_AREG0 TCG_REG_R27

2
tcg/s390/tcg-target.h
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@ -59,6 +59,7 @@ enum {
// #define TCG_TARGET_HAS_neg_i32
// #define TCG_TARGET_HAS_andc_i32
// #define TCG_TARGET_HAS_orc_i32
// #define TCG_TARGET_HAS_eqv_i32
// #define TCG_TARGET_HAS_div_i64
// #define TCG_TARGET_HAS_rot_i64
@ -75,6 +76,7 @@ enum {
// #define TCG_TARGET_HAS_neg_i64
// #define TCG_TARGET_HAS_andc_i64
// #define TCG_TARGET_HAS_orc_i64
// #define TCG_TARGET_HAS_eqv_i64
/* used for function call generation */
#define TCG_REG_CALL_STACK TCG_REG_R15

2
tcg/sparc/tcg-target.h
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@ -100,6 +100,7 @@ enum {
#define TCG_TARGET_HAS_not_i32
#define TCG_TARGET_HAS_andc_i32
#define TCG_TARGET_HAS_orc_i32
// #define TCG_TARGET_HAS_eqv_i32
#if TCG_TARGET_REG_BITS == 64
#define TCG_TARGET_HAS_div_i64
@ -117,6 +118,7 @@ enum {
#define TCG_TARGET_HAS_not_i64
#define TCG_TARGET_HAS_andc_i64
#define TCG_TARGET_HAS_orc_i64
// #define TCG_TARGET_HAS_eqv_i64
#endif
/* Note: must be synced with dyngen-exec.h */

11
tcg/tcg-op.h
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@ -1740,14 +1740,25 @@ static inline void tcg_gen_andc_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
static inline void tcg_gen_eqv_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
{
#ifdef TCG_TARGET_HAS_eqv_i32
tcg_gen_op3_i32(INDEX_op_eqv_i32, ret, arg1, arg2);
#else
tcg_gen_xor_i32(ret, arg1, arg2);
tcg_gen_not_i32(ret, ret);
#endif
}
static inline void tcg_gen_eqv_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
{
#ifdef TCG_TARGET_HAS_eqv_i64
tcg_gen_op3_i64(INDEX_op_eqv_i64, ret, arg1, arg2);
#elif defined(TCG_TARGET_HAS_eqv_i32) && TCG_TARGET_REG_BITS == 32
tcg_gen_eqv_i32(TCGV_LOW(ret), TCGV_LOW(arg1), TCGV_LOW(arg2));
tcg_gen_eqv_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2));
#else
tcg_gen_xor_i64(ret, arg1, arg2);
tcg_gen_not_i64(ret, ret);
#endif
}
static inline void tcg_gen_nand_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)

6
tcg/tcg-opc.h
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@ -116,6 +116,9 @@ DEF2(andc_i32, 1, 2, 0, 0)
#ifdef TCG_TARGET_HAS_orc_i32
DEF2(orc_i32, 1, 2, 0, 0)
#endif
#ifdef TCG_TARGET_HAS_eqv_i32
DEF2(eqv_i32, 1, 2, 0, 0)
#endif
#if TCG_TARGET_REG_BITS == 64
DEF2(mov_i64, 1, 1, 0, 0)
@ -199,6 +202,9 @@ DEF2(andc_i64, 1, 2, 0, 0)
#ifdef TCG_TARGET_HAS_orc_i64
DEF2(orc_i64, 1, 2, 0, 0)
#endif
#ifdef TCG_TARGET_HAS_eqv_i64
DEF2(eqv_i64, 1, 2, 0, 0)
#endif
#endif
/* QEMU specific */

2
tcg/x86_64/tcg-target.h
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@ -84,6 +84,8 @@ enum {
// #define TCG_TARGET_HAS_andc_i64
// #define TCG_TARGET_HAS_orc_i32
// #define TCG_TARGET_HAS_orc_i64
// #define TCG_TARGET_HAS_eqv_i32
// #define TCG_TARGET_HAS_eqv_i64
#define TCG_TARGET_HAS_GUEST_BASE