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target/tricore: Fix RR_JLI clobbering reg A[11] 

if A[r1] == A[11], then we would overwrite the destination address of
the jump with the return address.

Reported-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Message-Id: <20230621142302.1648383-2-kbastian@mail.uni-paderborn.de>
This commit is contained in:
Bastian Koppelmann 2023-06-21 16:22:55 +02:00
parent 82736612e7
commit 8da70480f5
1 changed files with 1 additions and 1 deletions
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2
target/tricore/translate.c
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@ -6064,8 +6064,8 @@ static void decode_rr_idirect(DisasContext *ctx)
tcg_gen_andi_tl(cpu_PC, cpu_gpr_a[r1], ~0x1); tcg_gen_andi_tl(cpu_PC, cpu_gpr_a[r1], ~0x1);
break; break;
case OPC2_32_RR_JLI: case OPC2_32_RR_JLI:
tcg_gen_movi_tl(cpu_gpr_a[11], ctx->pc_succ_insn);
tcg_gen_andi_tl(cpu_PC, cpu_gpr_a[r1], ~0x1); tcg_gen_andi_tl(cpu_PC, cpu_gpr_a[r1], ~0x1);
tcg_gen_movi_tl(cpu_gpr_a[11], ctx->pc_succ_insn);
break; break;
case OPC2_32_RR_CALLI: case OPC2_32_RR_CALLI:
gen_helper_1arg(call, ctx->pc_succ_insn); gen_helper_1arg(call, ctx->pc_succ_insn);