target-ppc: Introduce DFP Multiply

Add emulation of the PowerPC Decimal Floating Point Multiply instructions
dmul[q][.]

Signed-off-by: Tom Musta <tommusta@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
This commit is contained in:
Tom Musta 2014-04-21 15:55:03 -05:00 committed by Alexander Graf
parent 2128f8a57e
commit 8de6a1cc67
3 changed files with 29 additions and 0 deletions

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@ -261,6 +261,16 @@ static void dfp_check_for_VXISI_subtract(struct PPC_DFP *dfp)
dfp_check_for_VXISI(dfp, 1);
}
static void dfp_check_for_VXIMZ(struct PPC_DFP *dfp)
{
if (dfp->context.status & DEC_Invalid_operation) {
if ((decNumberIsInfinite(&dfp->a) && decNumberIsZero(&dfp->b)) ||
(decNumberIsInfinite(&dfp->b) && decNumberIsZero(&dfp->a))) {
dfp_set_FPSCR_flag(dfp, FP_VX | FP_VXIMZ, FP_VE);
}
}
}
#define DFP_HELPER_TAB(op, dnop, postprocs, size) \
void helper_##op(CPUPPCState *env, uint64_t *t, uint64_t *a, uint64_t *b) \
{ \
@ -302,3 +312,16 @@ static void SUB_PPs(struct PPC_DFP *dfp)
DFP_HELPER_TAB(dsub, decNumberSubtract, SUB_PPs, 64)
DFP_HELPER_TAB(dsubq, decNumberSubtract, SUB_PPs, 128)
static void MUL_PPs(struct PPC_DFP *dfp)
{
dfp_set_FPRF_from_FRT(dfp);
dfp_check_for_OX(dfp);
dfp_check_for_UX(dfp);
dfp_check_for_XX(dfp);
dfp_check_for_VXSNAN(dfp);
dfp_check_for_VXIMZ(dfp);
}
DFP_HELPER_TAB(dmul, decNumberMultiply, MUL_PPs, 64)
DFP_HELPER_TAB(dmulq, decNumberMultiply, MUL_PPs, 128)

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@ -620,3 +620,5 @@ DEF_HELPER_4(dadd, void, env, fprp, fprp, fprp)
DEF_HELPER_4(daddq, void, env, fprp, fprp, fprp)
DEF_HELPER_4(dsub, void, env, fprp, fprp, fprp)
DEF_HELPER_4(dsubq, void, env, fprp, fprp, fprp)
DEF_HELPER_4(dmul, void, env, fprp, fprp, fprp)
DEF_HELPER_4(dmulq, void, env, fprp, fprp, fprp)

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@ -8360,6 +8360,8 @@ GEN_DFP_T_A_B_Rc(dadd)
GEN_DFP_T_A_B_Rc(daddq)
GEN_DFP_T_A_B_Rc(dsub)
GEN_DFP_T_A_B_Rc(dsubq)
GEN_DFP_T_A_B_Rc(dmul)
GEN_DFP_T_A_B_Rc(dmulq)
/*** SPE extension ***/
/* Register moves */
@ -11291,6 +11293,8 @@ GEN_DFP_T_A_B_Rc(dadd, 0x02, 0x00),
GEN_DFP_Tp_Ap_Bp_Rc(daddq, 0x02, 0x00),
GEN_DFP_T_A_B_Rc(dsub, 0x02, 0x10),
GEN_DFP_Tp_Ap_Bp_Rc(dsubq, 0x02, 0x10),
GEN_DFP_T_A_B_Rc(dmul, 0x02, 0x01),
GEN_DFP_Tp_Ap_Bp_Rc(dmulq, 0x02, 0x01),
#undef GEN_SPE
#define GEN_SPE(name0, name1, opc2, opc3, inval0, inval1, type) \
GEN_OPCODE_DUAL(name0##_##name1, 0x04, opc2, opc3, inval0, inval1, type, PPC_NONE)