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target/ppc: Update fre to new flags 

Use float_flag_invalid_snan instead of recomputing
the snan-ness of the operand.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20211119160502.17432-27-richard.henderson@linaro.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
This commit is contained in:
Richard Henderson 2021-12-17 17:57:15 +01:00 committed by Cédric Le Goater
parent 053e23a694
commit 8ea0b1408e
1 changed files with 8 additions and 13 deletions
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21
target/ppc/fpu_helper.c
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@ -765,20 +765,15 @@ float64 helper_fre(CPUPPCState *env, float64 arg)
{
/* "Estimate" the reciprocal with actual division. */
float64 ret = float64_div(float64_one, arg, &env->fp_status);
int status = get_float_exception_flags(&env->fp_status);
int flags = get_float_exception_flags(&env->fp_status);
if (unlikely(status)) {
if (status & float_flag_invalid) {
if (float64_is_signaling_nan(arg, &env->fp_status)) {
/* sNaN reciprocal */
float_invalid_op_vxsnan(env, GETPC());
}
}
if (status & float_flag_divbyzero) {
float_zero_divide_excp(env, GETPC());
/* For FPSCR.ZE == 0, the result is 1/2. */
ret = float64_set_sign(float64_half, float64_is_neg(arg));
}
if (unlikely(flags & float_flag_invalid_snan)) {
float_invalid_op_vxsnan(env, GETPC());
}
if (unlikely(flags & float_flag_divbyzero)) {
float_zero_divide_excp(env, GETPC());
/* For FPSCR.ZE == 0, the result is 1/2. */
ret = float64_set_sign(float64_half, float64_is_neg(arg));
}
return ret;