tests/tcg/arm: add fcvt test cases for AArch32/64
This runs through the usual float to float conversions and crucially also runs with ARM Alternative Half Precision Format. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
This commit is contained in:
Alex Bennée
parent
29e0436e3d
commit
8ec8a55e3f
19
tests/tcg/aarch64/Makefile.target
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19
tests/tcg/aarch64/Makefile.target
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@ -0,0 +1,19 @@
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# -*- Mode: makefile -*-
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#
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# AArch64 specific tweaks
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AARCH64_SRC=$(SRC_PATH)/tests/tcg/aarch64
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VPATH += $(AARCH64_SRC)
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# we don't build any of the ARM tests
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AARCH64_TESTS=$(filter-out $(ARM_TESTS), $(TESTS))
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AARCH64_TESTS+=fcvt
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TESTS:=$(AARCH64_TESTS)
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fcvt: LDFLAGS+=-lm
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run-fcvt: fcvt
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$(call quiet-command, \
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$(QEMU) $< > fcvt.out && \
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diff -u $(AARCH64_SRC)/fcvt.ref fcvt.out, \
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"TEST", "$< (default) on $(TARGET_NAME)")
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3268
tests/tcg/aarch64/fcvt.ref
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3268
tests/tcg/aarch64/fcvt.ref
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File diff suppressed because it is too large
Load Diff
@ -8,7 +8,9 @@ ARM_SRC=$(SRC_PATH)/tests/tcg/arm
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# Set search path for all sources
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VPATH += $(ARM_SRC)
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TESTS += hello-arm test-arm-iwmmxt
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ARM_TESTS=hello-arm test-arm-iwmmxt
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TESTS += $(ARM_TESTS) fcvt
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hello-arm: CFLAGS+=-marm -ffreestanding
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hello-arm: LDFLAGS+=-nostdlib
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@ -17,5 +19,16 @@ test-arm-iwmmxt: CFLAGS+=-marm -march=iwmmxt -mabi=aapcs -mfpu=fpv4-sp-d16
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test-arm-iwmmxt: test-arm-iwmmxt.S
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$(CC) $(CFLAGS) $< -o $@ $(LDFLAGS)
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ifeq ($(TARGET_NAME), arm)
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fcvt: LDFLAGS+=-lm
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# fcvt: CFLAGS+=-march=armv8.2-a+fp16 -mfpu=neon-fp-armv8
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run-fcvt: fcvt
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$(call quiet-command, \
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$(QEMU) $< > fcvt.out && \
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diff -u $(ARM_SRC)/fcvt.ref fcvt.out, \
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"TEST", "$< (default) on $(TARGET_NAME)")
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endif
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# On ARM Linux only supports 4k pages
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EXTRA_RUNS+=run-test-mmap-4096
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458
tests/tcg/arm/fcvt.c
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458
tests/tcg/arm/fcvt.c
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@ -0,0 +1,458 @@
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/*
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* Test Floating Point Conversion
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*/
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/* we want additional float type definitions */
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#define __STDC_WANT_IEC_60559_BFP_EXT__
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#define __STDC_WANT_IEC_60559_TYPES_EXT__
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#include <stdio.h>
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#include <inttypes.h>
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#include <math.h>
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#include <float.h>
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#include <fenv.h>
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#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
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static char flag_str[256];
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static char *get_flag_state(int flags)
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{
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if (flags) {
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snprintf(flag_str, sizeof(flag_str), "%s %s %s %s %s",
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flags & FE_OVERFLOW ? "OVERFLOW" : "",
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flags & FE_UNDERFLOW ? "UNDERFLOW" : "",
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flags & FE_DIVBYZERO ? "DIV0" : "",
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flags & FE_INEXACT ? "INEXACT" : "",
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flags & FE_INVALID ? "INVALID" : "");
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} else {
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snprintf(flag_str, sizeof(flag_str), "OK");
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}
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return flag_str;
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}
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static void print_double_number(int i, double num)
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{
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uint64_t double_as_hex = *(uint64_t *) #
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int flags = fetestexcept(FE_ALL_EXCEPT);
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char *fstr = get_flag_state(flags);
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printf("%02d DOUBLE: %02.20e / %#020" PRIx64 " (%#x => %s)\n",
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i, num, double_as_hex, flags, fstr);
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}
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static void print_single_number(int i, float num)
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{
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uint32_t single_as_hex = *(uint32_t *) #
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int flags = fetestexcept(FE_ALL_EXCEPT);
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char *fstr = get_flag_state(flags);
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printf("%02d SINGLE: %02.20e / %#010x (%#x => %s)\n",
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i, num, single_as_hex, flags, fstr);
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}
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static void print_half_number(int i, uint16_t num)
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{
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int flags = fetestexcept(FE_ALL_EXCEPT);
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char *fstr = get_flag_state(flags);
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printf("%02d HALF: %#04x (%#x => %s)\n",
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i, num, flags, fstr);
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}
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static void print_int64(int i, int64_t num)
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{
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uint64_t int64_as_hex = *(uint64_t *) #
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int flags = fetestexcept(FE_ALL_EXCEPT);
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char *fstr = get_flag_state(flags);
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printf("%02d INT64: %20" PRId64 "/%#020" PRIx64 " (%#x => %s)\n",
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i, num, int64_as_hex, flags, fstr);
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}
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#ifndef SNANF
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/* Signaling NaN macros, if supported. */
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# if __GNUC_PREREQ(3, 3)
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# define SNANF (__builtin_nansf (""))
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# define SNAN (__builtin_nans (""))
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# define SNANL (__builtin_nansl (""))
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# endif
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#endif
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float single_numbers[] = { -SNANF,
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-NAN,
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-INFINITY,
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-FLT_MAX,
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-1.111E+31,
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-1.111E+30,
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-1.08700982e-12,
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-1.78051176e-20,
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-FLT_MIN,
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0.0,
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FLT_MIN,
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2.98023224e-08,
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5.96046E-8, /* min positive FP16 subnormal */
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6.09756E-5, /* max subnormal FP16 */
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6.10352E-5, /* min positive normal FP16 */
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1.0,
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1.0009765625, /* smallest float after 1.0 FP16 */
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2.0,
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M_E, M_PI,
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65503.0,
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65504.0, /* max FP16 */
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65505.0,
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131007.0,
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131008.0, /* max AFP */
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131009.0,
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1.111E+30,
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FLT_MAX,
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INFINITY,
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NAN,
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SNANF };
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static void convert_single_to_half(void)
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{
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int i;
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printf("Converting single-precision to half-precision\n");
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for (i = 0; i < ARRAY_SIZE(single_numbers); ++i) {
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float input = single_numbers[i];
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feclearexcept(FE_ALL_EXCEPT);
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print_single_number(i, input);
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#if defined(__arm__)
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uint32_t output;
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asm("vcvtb.f16.f32 %0, %1" : "=t" (output) : "x" (input));
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#else
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uint16_t output;
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asm("fcvt %h0, %s1" : "=w" (output) : "x" (input));
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#endif
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print_half_number(i, output);
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}
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}
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static void convert_single_to_double(void)
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{
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int i;
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printf("Converting single-precision to double-precision\n");
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for (i = 0; i < ARRAY_SIZE(single_numbers); ++i) {
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float input = single_numbers[i];
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/* uint64_t output; */
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double output;
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feclearexcept(FE_ALL_EXCEPT);
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print_single_number(i, input);
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#if defined(__arm__)
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asm("vcvt.f64.f32 %P0, %1" : "=w" (output) : "t" (input));
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#else
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asm("fcvt %d0, %s1" : "=w" (output) : "x" (input));
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#endif
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print_double_number(i, output);
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}
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}
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static void convert_single_to_integer(void)
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{
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int i;
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printf("Converting single-precision to integer\n");
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for (i = 0; i < ARRAY_SIZE(single_numbers); ++i) {
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float input = single_numbers[i];
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int64_t output;
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feclearexcept(FE_ALL_EXCEPT);
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print_single_number(i, input);
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#if defined(__arm__)
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/* asm("vcvt.s32.f32 %s0, %s1" : "=t" (output) : "t" (input)); */
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output = input;
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#else
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asm("fcvtzs %0, %s1" : "=r" (output) : "w" (input));
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#endif
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print_int64(i, output);
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}
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}
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/* This allows us to initialise some doubles as pure hex */
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typedef union {
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double d;
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uint64_t h;
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} test_doubles;
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test_doubles double_numbers[] = {
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{SNAN},
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{-NAN},
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{-INFINITY},
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{-DBL_MAX},
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{-FLT_MAX-1.0},
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{-FLT_MAX},
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{-1.111E+31},
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{-1.111E+30}, /* half prec */
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{-2.0}, {-1.0},
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{-DBL_MIN},
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{-FLT_MIN},
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{0.0},
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{FLT_MIN},
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{2.98023224e-08},
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{5.96046E-8}, /* min positive FP16 subnormal */
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{6.09756E-5}, /* max subnormal FP16 */
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{6.10352E-5}, /* min positive normal FP16 */
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{1.0},
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{1.0009765625}, /* smallest float after 1.0 FP16 */
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{DBL_MIN},
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{1.3789972848607228e-308},
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{1.4914738736681624e-308},
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{1.0}, {2.0},
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{M_E}, {M_PI},
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{65503.0},
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{65504.0}, /* max FP16 */
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{65505.0},
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{131007.0},
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{131008.0}, /* max AFP */
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{131009.0},
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{.h = 0x41dfffffffc00000 }, /* to int = 0x7fffffff */
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{FLT_MAX},
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{FLT_MAX + 1.0},
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{DBL_MAX},
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{INFINITY},
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{NAN},
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{.h = 0x7ff0000000000001}, /* SNAN */
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{SNAN},
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};
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static void convert_double_to_half(void)
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{
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int i;
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printf("Converting double-precision to half-precision\n");
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for (i = 0; i < ARRAY_SIZE(double_numbers); ++i) {
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double input = double_numbers[i].d;
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uint16_t output;
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feclearexcept(FE_ALL_EXCEPT);
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print_double_number(i, input);
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/* as we don't have _Float16 support */
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#if defined(__arm__)
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/* asm("vcvtb.f16.f64 %0, %P1" : "=t" (output) : "x" (input)); */
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output = input;
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#else
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asm("fcvt %h0, %d1" : "=w" (output) : "x" (input));
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#endif
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print_half_number(i, output);
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}
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}
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static void convert_double_to_single(void)
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{
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int i;
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printf("Converting double-precision to single-precision\n");
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for (i = 0; i < ARRAY_SIZE(double_numbers); ++i) {
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double input = double_numbers[i].d;
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uint32_t output;
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feclearexcept(FE_ALL_EXCEPT);
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print_double_number(i, input);
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#if defined(__arm__)
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asm("vcvt.f32.f64 %0, %P1" : "=w" (output) : "x" (input));
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#else
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asm("fcvt %s0, %d1" : "=w" (output) : "x" (input));
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#endif
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print_single_number(i, output);
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}
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}
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static void convert_double_to_integer(void)
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{
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int i;
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printf("Converting double-precision to integer\n");
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for (i = 0; i < ARRAY_SIZE(double_numbers); ++i) {
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double input = double_numbers[i].d;
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int64_t output;
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feclearexcept(FE_ALL_EXCEPT);
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print_double_number(i, input);
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#if defined(__arm__)
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/* asm("vcvt.s32.f32 %s0, %s1" : "=t" (output) : "t" (input)); */
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output = input;
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#else
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asm("fcvtzs %0, %d1" : "=r" (output) : "w" (input));
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#endif
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print_int64(i, output);
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}
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}
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/* no handy defines for these numbers */
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uint16_t half_numbers[] = {
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0xffff, /* -NaN / AHP -Max */
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0xfcff, /* -NaN / AHP */
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0xfc01, /* -NaN / AHP */
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0xfc00, /* -Inf */
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0xfbff, /* -Max */
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0xc000, /* -2 */
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0xbc00, /* -1 */
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0x8001, /* -MIN subnormal */
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0x8000, /* -0 */
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0x0000, /* +0 */
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0x0001, /* MIN subnormal */
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0x3c00, /* 1 */
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0x7bff, /* Max */
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0x7c00, /* Inf */
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0x7c01, /* NaN / AHP */
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0x7cff, /* NaN / AHP */
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0x7fff, /* NaN / AHP +Max*/
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};
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static void convert_half_to_double(void)
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{
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int i;
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printf("Converting half-precision to double-precision\n");
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for (i = 0; i < ARRAY_SIZE(half_numbers); ++i) {
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uint16_t input = half_numbers[i];
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double output;
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feclearexcept(FE_ALL_EXCEPT);
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print_half_number(i, input);
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#if defined(__arm__)
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/* asm("vcvtb.f64.f16 %P0, %1" : "=w" (output) : "t" (input)); */
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output = input;
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#else
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asm("fcvt %d0, %h1" : "=w" (output) : "x" (input));
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#endif
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print_double_number(i, output);
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}
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}
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static void convert_half_to_single(void)
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{
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int i;
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printf("Converting half-precision to single-precision\n");
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for (i = 0; i < ARRAY_SIZE(half_numbers); ++i) {
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uint16_t input = half_numbers[i];
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float output;
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feclearexcept(FE_ALL_EXCEPT);
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print_half_number(i, input);
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#if defined(__arm__)
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asm("vcvtb.f32.f16 %0, %1" : "=w" (output) : "x" ((uint32_t)input));
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#else
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asm("fcvt %s0, %h1" : "=w" (output) : "x" (input));
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#endif
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print_single_number(i, output);
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}
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}
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static void convert_half_to_integer(void)
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{
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int i;
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printf("Converting half-precision to integer\n");
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for (i = 0; i < ARRAY_SIZE(half_numbers); ++i) {
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uint16_t input = half_numbers[i];
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int64_t output;
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feclearexcept(FE_ALL_EXCEPT);
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print_half_number(i, input);
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#if defined(__arm__)
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/* asm("vcvt.s32.f16 %0, %1" : "=t" (output) : "t" (input)); v8.2*/
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output = input;
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#else
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asm("fcvt %s0, %h1" : "=w" (output) : "x" (input));
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#endif
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print_int64(i, output);
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}
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}
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typedef struct {
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int flag;
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char *desc;
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} float_mapping;
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float_mapping round_flags[] = {
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{ FE_TONEAREST, "to nearest" },
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{ FE_UPWARD, "upwards" },
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{ FE_DOWNWARD, "downwards" },
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{ FE_TOWARDZERO, "to zero" }
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};
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int main(int argc, char *argv[argc])
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{
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int i;
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printf("#### Enabling IEEE Half Precision\n");
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for (i = 0; i < ARRAY_SIZE(round_flags); ++i) {
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fesetround(round_flags[i].flag);
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printf("### Rounding %s\n", round_flags[i].desc);
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convert_single_to_half();
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convert_single_to_double();
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convert_double_to_half();
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convert_double_to_single();
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convert_half_to_single();
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convert_half_to_double();
|
||||
}
|
||||
|
||||
/* convert to integer */
|
||||
convert_single_to_integer();
|
||||
convert_double_to_integer();
|
||||
convert_half_to_integer();
|
||||
|
||||
/* And now with ARM alternative FP16 */
|
||||
#if defined(__arm__)
|
||||
/* See glibc sysdeps/arm/fpu_control.h */
|
||||
asm("mrc p10, 7, r1, cr1, cr0, 0\n\t"
|
||||
"orr r1, r1, %[flags]\n\t"
|
||||
"mcr p10, 7, r1, cr1, cr0, 0\n\t"
|
||||
: /* no output */ : [flags] "n" (1 << 26) : "r1" );
|
||||
#else
|
||||
asm("mrs x1, fpcr\n\t"
|
||||
"orr x1, x1, %[flags]\n\t"
|
||||
"msr fpcr, x1\n\t"
|
||||
: /* no output */ : [flags] "n" (1 << 26) : "x1" );
|
||||
#endif
|
||||
|
||||
printf("#### Enabling ARM Alternative Half Precision\n");
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(round_flags); ++i) {
|
||||
fesetround(round_flags[i].flag);
|
||||
printf("### Rounding %s\n", round_flags[i].desc);
|
||||
convert_single_to_half();
|
||||
convert_single_to_double();
|
||||
convert_double_to_half();
|
||||
convert_double_to_single();
|
||||
convert_half_to_single();
|
||||
convert_half_to_double();
|
||||
}
|
||||
|
||||
/* convert to integer */
|
||||
convert_single_to_integer();
|
||||
convert_double_to_integer();
|
||||
convert_half_to_integer();
|
||||
|
||||
return 0;
|
||||
}
|
||||
3268
tests/tcg/arm/fcvt.ref
Normal file
3268
tests/tcg/arm/fcvt.ref
Normal file
File diff suppressed because it is too large
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Reference in New Issue
Block a user