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Use FORCE_RET, scrap RETURN which was implemented in target-specific code. 

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3560 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
ths 2007-11-09 23:09:41 +00:00
parent 406f82e833
commit 8f6f6026f1
5 changed files with 418 additions and 424 deletions
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6
target-mips/exec.h
View File

@ -43,12 +43,6 @@ register target_ulong T2 asm(AREG3);
#define WTH2 (env->fpu->ft2.w[!FP_ENDIAN_IDX])
#endif
#if defined (DEBUG_OP)
# define RETURN() __asm__ __volatile__("nop" : : : "memory");
#else
# define RETURN() __asm__ __volatile__("" : : : "memory");
#endif
#include "cpu.h"
#include "exec-all.h"

16
target-mips/fop_template.c
View File

@ -25,14 +25,14 @@
void glue(glue(op_load_fpr_,tregname), FREG) (void) \
{ \
treg = env->fpu->fpr[FREG].fs[FP_ENDIAN_IDX]; \
RETURN(); \
FORCE_RET(); \
}
#define OP_WSTORE_FREG(treg, tregname, FREG) \
void glue(glue(op_store_fpr_,tregname), FREG) (void) \
{ \
env->fpu->fpr[FREG].fs[FP_ENDIAN_IDX] = treg; \
RETURN(); \
FORCE_RET(); \
}
/* WT0 = FREG.w: op_load_fpr_WT0_fprFREG */
@ -54,7 +54,7 @@ OP_WSTORE_FREG(WT2, WT2_fpr, FREG)
else \
treg = (uint64_t)(env->fpu->fpr[FREG | 1].fs[FP_ENDIAN_IDX]) << 32 | \
env->fpu->fpr[FREG & ~1].fs[FP_ENDIAN_IDX]; \
RETURN(); \
FORCE_RET(); \
}
#define OP_DSTORE_FREG(treg, tregname, FREG) \
@ -66,7 +66,7 @@ OP_WSTORE_FREG(WT2, WT2_fpr, FREG)
env->fpu->fpr[FREG | 1].fs[FP_ENDIAN_IDX] = treg >> 32; \
env->fpu->fpr[FREG & ~1].fs[FP_ENDIAN_IDX] = treg; \
} \
RETURN(); \
FORCE_RET(); \
}
OP_DLOAD_FREG(DT0, DT0_fpr, FREG)
@ -82,14 +82,14 @@ OP_DSTORE_FREG(DT2, DT2_fpr, FREG)
void glue(glue(op_load_fpr_,tregname), FREG) (void) \
{ \
treg = env->fpu->fpr[FREG].fs[!FP_ENDIAN_IDX]; \
RETURN(); \
FORCE_RET(); \
}
#define OP_PSSTORE_FREG(treg, tregname, FREG) \
void glue(glue(op_store_fpr_,tregname), FREG) (void) \
{ \
env->fpu->fpr[FREG].fs[!FP_ENDIAN_IDX] = treg; \
RETURN(); \
FORCE_RET(); \
}
OP_PSLOAD_FREG(WTH0, WTH0_fpr, FREG)
@ -109,12 +109,12 @@ OP_PSSTORE_FREG(WTH2, WTH2_fpr, FREG)
void glue(op_set, tregname)(void) \
{ \
treg = PARAM1; \
RETURN(); \
FORCE_RET(); \
} \
void glue(op_reset, tregname)(void) \
{ \
treg = 0; \
RETURN(); \
FORCE_RET(); \
}
SET_RESET(WT0, _WT0)

742
target-mips/op.c
View File

File diff suppressed because it is too large Load Diff

58
target-mips/op_mem.c
View File

@ -22,55 +22,55 @@
void glue(op_lb, MEMSUFFIX) (void)
{
T0 = glue(ldsb, MEMSUFFIX)(T0);
RETURN();
FORCE_RET();
}
void glue(op_lbu, MEMSUFFIX) (void)
{
T0 = glue(ldub, MEMSUFFIX)(T0);
RETURN();
FORCE_RET();
}
void glue(op_sb, MEMSUFFIX) (void)
{
glue(stb, MEMSUFFIX)(T0, T1);
RETURN();
FORCE_RET();
}
void glue(op_lh, MEMSUFFIX) (void)
{
T0 = glue(ldsw, MEMSUFFIX)(T0);
RETURN();
FORCE_RET();
}
void glue(op_lhu, MEMSUFFIX) (void)
{
T0 = glue(lduw, MEMSUFFIX)(T0);
RETURN();
FORCE_RET();
}
void glue(op_sh, MEMSUFFIX) (void)
{
glue(stw, MEMSUFFIX)(T0, T1);
RETURN();
FORCE_RET();
}
void glue(op_lw, MEMSUFFIX) (void)
{
T0 = glue(ldl, MEMSUFFIX)(T0);
RETURN();
FORCE_RET();
}
void glue(op_lwu, MEMSUFFIX) (void)
{
T0 = (uint32_t)glue(ldl, MEMSUFFIX)(T0);
RETURN();
FORCE_RET();
}
void glue(op_sw, MEMSUFFIX) (void)
{
glue(stl, MEMSUFFIX)(T0, T1);
RETURN();
FORCE_RET();
}
/* "half" load and stores. We must do the memory access inline,
@ -106,7 +106,7 @@ void glue(op_lwl, MEMSUFFIX) (void)
T1 = (T1 & 0xFFFFFF00) | tmp;
}
T1 = (int32_t)T1;
RETURN();
FORCE_RET();
}
void glue(op_lwr, MEMSUFFIX) (void)
@ -131,7 +131,7 @@ void glue(op_lwr, MEMSUFFIX) (void)
T1 = (T1 & 0x00FFFFFF) | (tmp << 24);
}
T1 = (int32_t)T1;
RETURN();
FORCE_RET();
}
void glue(op_swl, MEMSUFFIX) (void)
@ -147,7 +147,7 @@ void glue(op_swl, MEMSUFFIX) (void)
if (GET_LMASK(T0) == 0)
glue(stb, MEMSUFFIX)(GET_OFFSET(T0, 3), (uint8_t)T1);
RETURN();
FORCE_RET();
}
void glue(op_swr, MEMSUFFIX) (void)
@ -163,7 +163,7 @@ void glue(op_swr, MEMSUFFIX) (void)
if (GET_LMASK(T0) == 3)
glue(stb, MEMSUFFIX)(GET_OFFSET(T0, -3), (uint8_t)(T1 >> 24));
RETURN();
FORCE_RET();
}
void glue(op_ll, MEMSUFFIX) (void)
@ -171,7 +171,7 @@ void glue(op_ll, MEMSUFFIX) (void)
T1 = T0;
T0 = glue(ldl, MEMSUFFIX)(T0);
env->CP0_LLAddr = T1;
RETURN();
FORCE_RET();
}
void glue(op_sc, MEMSUFFIX) (void)
@ -187,20 +187,20 @@ void glue(op_sc, MEMSUFFIX) (void)
} else {
T0 = 0;
}
RETURN();
FORCE_RET();
}
#if defined(TARGET_MIPS64)
void glue(op_ld, MEMSUFFIX) (void)
{
T0 = glue(ldq, MEMSUFFIX)(T0);
RETURN();
FORCE_RET();
}
void glue(op_sd, MEMSUFFIX) (void)
{
glue(stq, MEMSUFFIX)(T0, T1);
RETURN();
FORCE_RET();
}
/* "half" load and stores. We must do the memory access inline,
@ -254,7 +254,7 @@ void glue(op_ldl, MEMSUFFIX) (void)
T1 = (T1 & 0xFFFFFFFFFFFFFF00ULL) | tmp;
}
RETURN();
FORCE_RET();
}
void glue(op_ldr, MEMSUFFIX) (void)
@ -299,7 +299,7 @@ void glue(op_ldr, MEMSUFFIX) (void)
T1 = (T1 & 0x00FFFFFFFFFFFFFFULL) | (tmp << 56);
}
RETURN();
FORCE_RET();
}
void glue(op_sdl, MEMSUFFIX) (void)
@ -327,7 +327,7 @@ void glue(op_sdl, MEMSUFFIX) (void)
if (GET_LMASK64(T0) <= 0)
glue(stb, MEMSUFFIX)(GET_OFFSET(T0, 7), (uint8_t)T1);
RETURN();
FORCE_RET();
}
void glue(op_sdr, MEMSUFFIX) (void)
@ -355,7 +355,7 @@ void glue(op_sdr, MEMSUFFIX) (void)
if (GET_LMASK64(T0) == 7)
glue(stb, MEMSUFFIX)(GET_OFFSET(T0, -7), (uint8_t)(T1 >> 56));
RETURN();
FORCE_RET();
}
void glue(op_lld, MEMSUFFIX) (void)
@ -363,7 +363,7 @@ void glue(op_lld, MEMSUFFIX) (void)
T1 = T0;
T0 = glue(ldq, MEMSUFFIX)(T0);
env->CP0_LLAddr = T1;
RETURN();
FORCE_RET();
}
void glue(op_scd, MEMSUFFIX) (void)
@ -379,37 +379,37 @@ void glue(op_scd, MEMSUFFIX) (void)
} else {
T0 = 0;
}
RETURN();
FORCE_RET();
}
#endif /* TARGET_MIPS64 */
void glue(op_lwc1, MEMSUFFIX) (void)
{
WT0 = glue(ldl, MEMSUFFIX)(T0);
RETURN();
FORCE_RET();
}
void glue(op_swc1, MEMSUFFIX) (void)
{
glue(stl, MEMSUFFIX)(T0, WT0);
RETURN();
FORCE_RET();
}
void glue(op_ldc1, MEMSUFFIX) (void)
{
DT0 = glue(ldq, MEMSUFFIX)(T0);
RETURN();
FORCE_RET();
}
void glue(op_sdc1, MEMSUFFIX) (void)
{
glue(stq, MEMSUFFIX)(T0, DT0);
RETURN();
FORCE_RET();
}
void glue(op_luxc1, MEMSUFFIX) (void)
{
DT0 = glue(ldq, MEMSUFFIX)(T0 & ~0x7);
RETURN();
FORCE_RET();
}
void glue(op_suxc1, MEMSUFFIX) (void)
{
glue(stq, MEMSUFFIX)(T0 & ~0x7, DT0);
RETURN();
FORCE_RET();
}

20
target-mips/op_template.c
View File

@ -22,44 +22,44 @@
void glue(op_load_gpr_T0_gpr, REG) (void)
{
T0 = env->gpr[REG][env->current_tc];
RETURN();
FORCE_RET();
}
void glue(op_store_T0_gpr_gpr, REG) (void)
{
env->gpr[REG][env->current_tc] = T0;
RETURN();
FORCE_RET();
}
void glue(op_load_gpr_T1_gpr, REG) (void)
{
T1 = env->gpr[REG][env->current_tc];
RETURN();
FORCE_RET();
}
void glue(op_store_T1_gpr_gpr, REG) (void)
{
env->gpr[REG][env->current_tc] = T1;
RETURN();
FORCE_RET();
}
void glue(op_load_gpr_T2_gpr, REG) (void)
{
T2 = env->gpr[REG][env->current_tc];
RETURN();
FORCE_RET();
}
void glue(op_load_srsgpr_T0_gpr, REG) (void)
{
T0 = env->gpr[REG][(env->CP0_SRSCtl >> CP0SRSCtl_PSS) & 0xf];
RETURN();
FORCE_RET();
}
void glue(op_store_T0_srsgpr_gpr, REG) (void)
{
env->gpr[REG][(env->CP0_SRSCtl >> CP0SRSCtl_PSS) & 0xf] = T0;
RETURN();
FORCE_RET();
}
#endif
@ -68,12 +68,12 @@ void glue(op_store_T0_srsgpr_gpr, REG) (void)
void glue(op_set, tregname)(void) \
{ \
treg = (int32_t)PARAM1; \
RETURN(); \
FORCE_RET(); \
} \
void glue(op_reset, tregname)(void) \
{ \
treg = 0; \
RETURN(); \
FORCE_RET(); \
} \
SET_RESET(T0, _T0)
@ -87,7 +87,7 @@ SET_RESET(T2, _T2)
void glue(op_set64, tregname)(void) \
{ \
treg = ((uint64_t)PARAM1 << 32) | (uint32_t)PARAM2; \
RETURN(); \
FORCE_RET(); \
}
SET64(T0, _T0)