target/arm: Enable FEAT_Debugv8p4 for -cpu max
This extension concerns changes to the External Debug interface, with Secure and Non-secure access to the debug registers, and all of it is outside the scope of QEMU. Indicating support for this is mandatory with FEAT_SEL2, which we do implement. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220506180242.216785-13-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -15,6 +15,7 @@ the following architecture extensions:
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- FEAT_DIT (Data Independent Timing instructions)
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- FEAT_DPB (DC CVAP instruction)
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- FEAT_Debugv8p2 (Debug changes for v8.2)
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- FEAT_Debugv8p4 (Debug changes for v8.4)
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- FEAT_DotProd (Advanced SIMD dot product instructions)
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- FEAT_FCMA (Floating-point complex number instructions)
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- FEAT_FHM (Floating-point half-precision multiplication instructions)
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@ -799,7 +799,7 @@ static void aarch64_max_initfn(Object *obj)
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cpu->isar.id_aa64zfr0 = t;
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t = cpu->isar.id_aa64dfr0;
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t = FIELD_DP64(t, ID_AA64DFR0, DEBUGVER, 8); /* FEAT_Debugv8p2 */
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t = FIELD_DP64(t, ID_AA64DFR0, DEBUGVER, 9); /* FEAT_Debugv8p4 */
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t = FIELD_DP64(t, ID_AA64DFR0, PMUVER, 5); /* FEAT_PMUv3p4 */
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cpu->isar.id_aa64dfr0 = t;
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@ -76,8 +76,8 @@ void aa32_max_features(ARMCPU *cpu)
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cpu->isar.id_pfr2 = t;
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t = cpu->isar.id_dfr0;
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t = FIELD_DP32(t, ID_DFR0, COPDBG, 8); /* FEAT_Debugv8p2 */
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t = FIELD_DP32(t, ID_DFR0, COPSDBG, 8); /* FEAT_Debugv8p2 */
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t = FIELD_DP32(t, ID_DFR0, COPDBG, 9); /* FEAT_Debugv8p4 */
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t = FIELD_DP32(t, ID_DFR0, COPSDBG, 9); /* FEAT_Debugv8p4 */
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t = FIELD_DP32(t, ID_DFR0, PERFMON, 5); /* FEAT_PMUv3p4 */
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cpu->isar.id_dfr0 = t;
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}
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