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tcg-hppa: Fix in/out register overlap in add2/sub2.

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Handle the output log part overlapping the input high parts.
Also, improve sub2 to handle some constants the second input low part.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
This commit is contained in:
Richard Henderson 2010-04-07 16:46:33 +02:00 committed by Aurelien Jarno
parent fd76e73a10
commit 91493631fe
2 changed files with 47 additions and 14 deletions
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60
tcg/hppa/tcg-target.c
View File

@ -210,6 +210,9 @@ static int target_parse_constraint(TCGArgConstraint *ct, const char **pct_str)
case 'J':
ct->ct |= TCG_CT_CONST_S5;
break;
case 'K':
ct->ct |= TCG_CT_CONST_MS11;
break;
default:
return -1;
}
@ -231,6 +234,8 @@ static int tcg_target_const_match(tcg_target_long val,
return check_fit_tl(val, 5);
} else if (ct & TCG_CT_CONST_S11) {
return check_fit_tl(val, 11);
} else if (ct & TCG_CT_CONST_MS11) {
return check_fit_tl(-val, 11);
}
return 0;
}
@ -675,6 +680,42 @@ static void tcg_out_xmpyu(TCGContext *s, int retl, int reth,
}
}
static void tcg_out_add2(TCGContext *s, int destl, int desth,
int al, int ah, int bl, int bh, int blconst)
{
int tmp = (destl == ah || destl == bh ? TCG_REG_R20 : destl);
if (blconst) {
tcg_out_arithi(s, tmp, al, bl, INSN_ADDI);
} else {
tcg_out_arith(s, tmp, al, bl, INSN_ADD);
}
tcg_out_arith(s, desth, ah, bh, INSN_ADDC);
tcg_out_mov(s, destl, tmp);
}
static void tcg_out_sub2(TCGContext *s, int destl, int desth, int al, int ah,
int bl, int bh, int alconst, int blconst)
{
int tmp = (destl == ah || destl == bh ? TCG_REG_R20 : destl);
if (alconst) {
if (blconst) {
tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_R20, bl);
bl = TCG_REG_R20;
}
tcg_out_arithi(s, tmp, bl, al, INSN_SUBI);
} else if (blconst) {
tcg_out_arithi(s, tmp, al, -bl, INSN_ADDI);
} else {
tcg_out_arith(s, tmp, al, bl, INSN_SUB);
}
tcg_out_arith(s, desth, ah, bh, INSN_SUBB);
tcg_out_mov(s, destl, tmp);
}
static void tcg_out_branch(TCGContext *s, int label_index, int nul)
{
TCGLabel *l = &s->labels[label_index];
@ -1427,22 +1468,13 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
break;
case INDEX_op_add2_i32:
if (const_args[4]) {
tcg_out_arithi(s, args[0], args[2], args[4], INSN_ADDI);
} else {
tcg_out_arith(s, args[0], args[2], args[4], INSN_ADD);
}
tcg_out_arith(s, args[1], args[3], args[5], INSN_ADDC);
tcg_out_add2(s, args[0], args[1], args[2], args[3],
args[4], args[5], const_args[4]);
break;
case INDEX_op_sub2_i32:
if (const_args[2]) {
/* Recall that SUBI is a reversed subtract. */
tcg_out_arithi(s, args[0], args[4], args[2], INSN_SUBI);
} else {
tcg_out_arith(s, args[0], args[2], args[4], INSN_SUB);
}
tcg_out_arith(s, args[1], args[3], args[5], INSN_SUBB);
tcg_out_sub2(s, args[0], args[1], args[2], args[3],
args[4], args[5], const_args[2], const_args[4]);
break;
case INDEX_op_qemu_ld8u:
@ -1536,7 +1568,7 @@ static const TCGTargetOpDef hppa_op_defs[] = {
{ INDEX_op_setcond2_i32, { "r", "rZ", "rZ", "rI", "rI" } },
{ INDEX_op_add2_i32, { "r", "r", "rZ", "rZ", "rI", "rZ" } },
{ INDEX_op_sub2_i32, { "r", "r", "rI", "rZ", "rZ", "rZ" } },
{ INDEX_op_sub2_i32, { "r", "r", "rI", "rZ", "rK", "rZ" } },
#if TARGET_LONG_BITS == 32
{ INDEX_op_qemu_ld8u, { "r", "L" } },

1
tcg/hppa/tcg-target.h
View File

@ -72,6 +72,7 @@ enum {
#define TCG_CT_CONST_0 0x0100
#define TCG_CT_CONST_S5 0x0200
#define TCG_CT_CONST_S11 0x0400
#define TCG_CT_CONST_MS11 0x0800
/* used for function call generation */
#define TCG_REG_CALL_STACK TCG_REG_SP