prep: fix I/O port endianness
Do not swap endianness here, it will happen during cpu_{in,out}{b,w,l}. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com> Message-id: 1374501278-31549-6-git-send-email-pbonzini@redhat.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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@ -410,7 +410,7 @@ static const MemoryRegionOps PPC_prep_io_ops = {
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.read = { PPC_prep_io_readb, PPC_prep_io_readw, PPC_prep_io_readl },
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.write = { PPC_prep_io_writeb, PPC_prep_io_writew, PPC_prep_io_writel },
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},
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.endianness = DEVICE_LITTLE_ENDIAN,
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.endianness = DEVICE_NATIVE_ENDIAN,
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};
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#define NVRAM_SIZE 0x2000
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