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hw/sd/sdhci: Yield if interrupt delivered during multiple transfer 

The Descriptor Table has a bit to allow the DMA to generates
Interrupt when the operation of the descriptor line is completed
(see "1.13.4. Descriptor Table" of 'SD Host Controller Simplified
Specification Version 2.00').

If we have pending interrupt and the descriptor requires it
to be generated as soon as it is completed, reschedule pending
transfers and yield to the CPU.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Alexander Bulekov <alxndr@bu.edu>
Message-Id: <20200903172806.489710-5-f4bug@amsat.org>
This commit is contained in:
Philippe Mathieu-Daudé 2020-09-03 17:31:04 +02:00
parent 2bd9ae7e30
commit 9321c1f2d0
1 changed files with 4 additions and 1 deletions
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5
hw/sd/sdhci.c
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@ -837,7 +837,10 @@ static void sdhci_do_adma(SDHCIState *s)
s->norintsts |= SDHC_NIS_DMA;
}
sdhci_update_irq(s);
if (sdhci_update_irq(s) && !(dscr.attr & SDHC_ADMA_ATTR_END)) {
/* IRQ delivered, reschedule current transfer */
break;
}
}
/* ADMA transfer terminates if blkcnt == 0 or by END attribute */