tcg/arm: implement andc op
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
This commit is contained in:
parent
a3f5054b1a
commit
932234f64c
@ -1445,6 +1445,9 @@ static inline void tcg_out_op(TCGContext *s, int opc,
|
||||
case INDEX_op_and_i32:
|
||||
c = ARITH_AND;
|
||||
goto gen_arith;
|
||||
case INDEX_op_andc_i32:
|
||||
c = ARITH_BIC;
|
||||
goto gen_arith;
|
||||
case INDEX_op_or_i32:
|
||||
c = ARITH_ORR;
|
||||
goto gen_arith;
|
||||
@ -1652,6 +1655,7 @@ static const TCGTargetOpDef arm_op_defs[] = {
|
||||
{ INDEX_op_div2_i32, { "r", "r", "r", "1", "2" } },
|
||||
{ INDEX_op_divu2_i32, { "r", "r", "r", "1", "2" } },
|
||||
{ INDEX_op_and_i32, { "r", "r", "rI" } },
|
||||
{ INDEX_op_andc_i32, { "r", "r", "rI" } },
|
||||
{ INDEX_op_or_i32, { "r", "r", "rI" } },
|
||||
{ INDEX_op_xor_i32, { "r", "r", "rI" } },
|
||||
{ INDEX_op_neg_i32, { "r", "r" } },
|
||||
|
@ -65,7 +65,7 @@ enum {
|
||||
#define TCG_TARGET_HAS_not_i32
|
||||
#define TCG_TARGET_HAS_neg_i32
|
||||
// #define TCG_TARGET_HAS_rot_i32
|
||||
// #define TCG_TARGET_HAS_andc_i32
|
||||
#define TCG_TARGET_HAS_andc_i32
|
||||
// #define TCG_TARGET_HAS_orc_i32
|
||||
|
||||
#define TCG_TARGET_HAS_GUEST_BASE
|
||||
|
Loading…
Reference in New Issue
Block a user