Merge remote-tracking branch 'kraxel/usb.66' into staging
* kraxel/usb.66: usb: Fix usb_packet_map() in the presence of IOMMUs usb-redir: Adjust pkg-config check for usbredirparser .pc file rename (v2) ehci: Fix interrupt packet MULT handling xhci: create a memory region for each port xhci: route string & usb hub support xhci: tweak limits compat: turn off msi/msix on xhci for old machine types add pc-1.3 machine type Conflicts: hw/pc_piix.c Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
This commit is contained in:
Anthony Liguori
commit
938406dfb1
6
configure
vendored
6
configure
vendored
@ -2748,10 +2748,10 @@ fi
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# check for usbredirparser for usb network redirection support
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if test "$usb_redir" != "no" ; then
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if $pkg_config --atleast-version=0.5 libusbredirparser >/dev/null 2>&1 ; then
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if $pkg_config --atleast-version=0.5 libusbredirparser-0.5 >/dev/null 2>&1 ; then
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usb_redir="yes"
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usb_redir_cflags=$($pkg_config --cflags libusbredirparser 2>/dev/null)
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usb_redir_libs=$($pkg_config --libs libusbredirparser 2>/dev/null)
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usb_redir_cflags=$($pkg_config --cflags libusbredirparser-0.5 2>/dev/null)
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usb_redir_libs=$($pkg_config --libs libusbredirparser-0.5 2>/dev/null)
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QEMU_CFLAGS="$QEMU_CFLAGS $usb_redir_cflags"
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libs_softmmu="$libs_softmmu $usb_redir_libs"
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else
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@ -373,6 +373,7 @@ struct EHCIQueue {
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uint32_t seen;
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uint64_t ts;
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int async;
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int transact_ctr;
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/* cached data from guest - needs to be flushed
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* when guest removes an entry (doorbell, handshake sequence)
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@ -1837,6 +1838,11 @@ static EHCIQueue *ehci_state_fetchqh(EHCIState *ehci, int async)
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}
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q->qh = qh;
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q->transact_ctr = get_field(q->qh.epcap, QH_EPCAP_MULT);
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if (q->transact_ctr == 0) { /* Guest bug in some versions of windows */
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q->transact_ctr = 4;
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}
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if (q->dev == NULL) {
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q->dev = ehci_find_device(q->ehci, devaddr);
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}
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@ -2014,11 +2020,8 @@ static int ehci_state_fetchqtd(EHCIQueue *q)
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} else if (p != NULL) {
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switch (p->async) {
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case EHCI_ASYNC_NONE:
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/* Should never happen packet should at least be initialized */
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assert(0);
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break;
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case EHCI_ASYNC_INITIALIZED:
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/* Previously nacked packet (likely interrupt ep) */
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/* Not yet executed (MULT), or previously nacked (int) packet */
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ehci_set_state(q->ehci, q->async, EST_EXECUTE);
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break;
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case EHCI_ASYNC_INFLIGHT:
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@ -2107,15 +2110,12 @@ static int ehci_state_execute(EHCIQueue *q)
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// TODO verify enough time remains in the uframe as in 4.4.1.1
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// TODO write back ptr to async list when done or out of time
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// TODO Windows does not seem to ever set the MULT field
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if (!q->async) {
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int transactCtr = get_field(q->qh.epcap, QH_EPCAP_MULT);
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if (!transactCtr) {
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ehci_set_state(q->ehci, q->async, EST_HORIZONTALQH);
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again = 1;
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goto out;
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}
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/* 4.10.3, bottom of page 82, go horizontal on transaction counter == 0 */
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if (!q->async && q->transact_ctr == 0) {
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ehci_set_state(q->ehci, q->async, EST_HORIZONTALQH);
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again = 1;
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goto out;
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}
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if (q->async) {
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@ -2132,7 +2132,11 @@ static int ehci_state_execute(EHCIQueue *q)
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trace_usb_ehci_packet_action(p->queue, p, "async");
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p->async = EHCI_ASYNC_INFLIGHT;
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ehci_set_state(q->ehci, q->async, EST_HORIZONTALQH);
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again = (ehci_fill_queue(p) == USB_RET_PROCERR) ? -1 : 1;
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if (q->async) {
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again = (ehci_fill_queue(p) == USB_RET_PROCERR) ? -1 : 1;
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} else {
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again = 1;
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}
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goto out;
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}
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@ -2152,13 +2156,9 @@ static int ehci_state_executing(EHCIQueue *q)
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ehci_execute_complete(q);
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// 4.10.3
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if (!q->async) {
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int transactCtr = get_field(q->qh.epcap, QH_EPCAP_MULT);
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transactCtr--;
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set_field(&q->qh.epcap, transactCtr, QH_EPCAP_MULT);
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// 4.10.3, bottom of page 82, should exit this state when transaction
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// counter decrements to 0
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/* 4.10.3 */
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if (!q->async && q->transact_ctr > 0) {
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q->transact_ctr--;
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}
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/* 4.10.5 */
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@ -37,12 +37,12 @@
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#define FIXME() do { fprintf(stderr, "FIXME %s:%d\n", \
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__func__, __LINE__); abort(); } while (0)
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#define MAXPORTS_2 8
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#define MAXPORTS_3 8
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#define MAXPORTS_2 15
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#define MAXPORTS_3 15
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#define MAXPORTS (MAXPORTS_2+MAXPORTS_3)
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#define MAXSLOTS MAXPORTS
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#define MAXINTRS MAXPORTS
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#define MAXSLOTS 64
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#define MAXINTRS 16
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#define TD_QUEUE 24
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@ -285,6 +285,8 @@ typedef enum TRBCCode {
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#define SLOT_CONTEXT_ENTRIES_MASK 0x1f
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#define SLOT_CONTEXT_ENTRIES_SHIFT 27
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typedef struct XHCIState XHCIState;
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typedef enum EPType {
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ET_INVALID = 0,
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ET_ISO_OUT,
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@ -303,15 +305,15 @@ typedef struct XHCIRing {
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} XHCIRing;
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typedef struct XHCIPort {
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XHCIState *xhci;
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uint32_t portsc;
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uint32_t portnr;
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USBPort *uport;
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uint32_t speedmask;
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char name[16];
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MemoryRegion mem;
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} XHCIPort;
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struct XHCIState;
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typedef struct XHCIState XHCIState;
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typedef struct XHCITransfer {
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XHCIState *xhci;
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USBPacket packet;
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@ -363,7 +365,7 @@ typedef struct XHCIEPContext {
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typedef struct XHCISlot {
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bool enabled;
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dma_addr_t ctx;
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unsigned int port;
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USBPort *uport;
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unsigned int devaddr;
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XHCIEPContext * eps[31];
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} XHCISlot;
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@ -1230,7 +1232,7 @@ static TRBCCode xhci_reset_ep(XHCIState *xhci, unsigned int slotid,
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ep |= 0x80;
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}
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dev = xhci->ports[xhci->slots[slotid-1].port-1].uport->dev;
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dev = xhci->slots[slotid-1].uport->dev;
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if (!dev) {
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return CC_USB_TRANSACTION_ERROR;
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}
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@ -1412,18 +1414,9 @@ static void xhci_stall_ep(XHCITransfer *xfer)
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static int xhci_submit(XHCIState *xhci, XHCITransfer *xfer,
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XHCIEPContext *epctx);
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|
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static USBDevice *xhci_find_device(XHCIPort *port, uint8_t addr)
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{
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||||
if (!(port->portsc & PORTSC_PED)) {
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return NULL;
|
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}
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return usb_find_device(port->uport, addr);
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}
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static int xhci_setup_packet(XHCITransfer *xfer)
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{
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XHCIState *xhci = xfer->xhci;
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XHCIPort *port;
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USBDevice *dev;
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USBEndpoint *ep;
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int dir;
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@ -1434,13 +1427,12 @@ static int xhci_setup_packet(XHCITransfer *xfer)
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ep = xfer->packet.ep;
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dev = ep->dev;
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} else {
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port = &xhci->ports[xhci->slots[xfer->slotid-1].port-1];
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dev = xhci_find_device(port, xhci->slots[xfer->slotid-1].devaddr);
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if (!dev) {
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fprintf(stderr, "xhci: slot %d port %d has no device\n",
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xfer->slotid, xhci->slots[xfer->slotid-1].port);
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if (!xhci->slots[xfer->slotid-1].uport) {
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fprintf(stderr, "xhci: slot %d has no device\n",
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xfer->slotid);
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return -1;
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}
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dev = xhci->slots[xfer->slotid-1].uport->dev;
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ep = usb_ep_get(dev, dir, xfer->epid >> 1);
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}
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@ -1772,7 +1764,7 @@ static TRBCCode xhci_enable_slot(XHCIState *xhci, unsigned int slotid)
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trace_usb_xhci_slot_enable(slotid);
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assert(slotid >= 1 && slotid <= MAXSLOTS);
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xhci->slots[slotid-1].enabled = 1;
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xhci->slots[slotid-1].port = 0;
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xhci->slots[slotid-1].uport = NULL;
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memset(xhci->slots[slotid-1].eps, 0, sizeof(XHCIEPContext*)*31);
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return CC_SUCCESS;
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@ -1795,17 +1787,42 @@ static TRBCCode xhci_disable_slot(XHCIState *xhci, unsigned int slotid)
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return CC_SUCCESS;
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}
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static USBPort *xhci_lookup_uport(XHCIState *xhci, uint32_t *slot_ctx)
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{
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USBPort *uport;
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char path[32];
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int i, pos, port;
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port = (slot_ctx[1]>>16) & 0xFF;
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port = xhci->ports[port-1].uport->index+1;
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pos = snprintf(path, sizeof(path), "%d", port);
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for (i = 0; i < 5; i++) {
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port = (slot_ctx[0] >> 4*i) & 0x0f;
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if (!port) {
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break;
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}
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pos += snprintf(path + pos, sizeof(path) - pos, ".%d", port);
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}
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QTAILQ_FOREACH(uport, &xhci->bus.used, next) {
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if (strcmp(uport->path, path) == 0) {
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return uport;
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}
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}
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return NULL;
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}
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static TRBCCode xhci_address_slot(XHCIState *xhci, unsigned int slotid,
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uint64_t pictx, bool bsr)
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{
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XHCISlot *slot;
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USBPort *uport;
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USBDevice *dev;
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dma_addr_t ictx, octx, dcbaap;
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uint64_t poctx;
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uint32_t ictl_ctx[2];
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uint32_t slot_ctx[4];
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uint32_t ep0_ctx[5];
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unsigned int port;
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int i;
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TRBCCode res;
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|
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@ -1837,27 +1854,28 @@ static TRBCCode xhci_address_slot(XHCIState *xhci, unsigned int slotid,
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DPRINTF("xhci: input ep0 context: %08x %08x %08x %08x %08x\n",
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ep0_ctx[0], ep0_ctx[1], ep0_ctx[2], ep0_ctx[3], ep0_ctx[4]);
|
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|
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port = (slot_ctx[1]>>16) & 0xFF;
|
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dev = xhci->ports[port-1].uport->dev;
|
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|
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if (port < 1 || port > xhci->numports) {
|
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fprintf(stderr, "xhci: bad port %d\n", port);
|
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uport = xhci_lookup_uport(xhci, slot_ctx);
|
||||
if (uport == NULL) {
|
||||
fprintf(stderr, "xhci: port not found\n");
|
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return CC_TRB_ERROR;
|
||||
} else if (!dev) {
|
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fprintf(stderr, "xhci: port %d not connected\n", port);
|
||||
}
|
||||
|
||||
dev = uport->dev;
|
||||
if (!dev) {
|
||||
fprintf(stderr, "xhci: port %s not connected\n", uport->path);
|
||||
return CC_USB_TRANSACTION_ERROR;
|
||||
}
|
||||
|
||||
for (i = 0; i < MAXSLOTS; i++) {
|
||||
if (xhci->slots[i].port == port) {
|
||||
fprintf(stderr, "xhci: port %d already assigned to slot %d\n",
|
||||
port, i+1);
|
||||
if (xhci->slots[i].uport == uport) {
|
||||
fprintf(stderr, "xhci: port %s already assigned to slot %d\n",
|
||||
uport->path, i+1);
|
||||
return CC_TRB_ERROR;
|
||||
}
|
||||
}
|
||||
|
||||
slot = &xhci->slots[slotid-1];
|
||||
slot->port = port;
|
||||
slot->uport = uport;
|
||||
slot->ctx = octx;
|
||||
|
||||
if (bsr) {
|
||||
@ -2414,20 +2432,14 @@ static uint64_t xhci_cap_read(void *ptr, target_phys_addr_t reg, unsigned size)
|
||||
return ret;
|
||||
}
|
||||
|
||||
static uint32_t xhci_port_read(XHCIState *xhci, uint32_t reg)
|
||||
static uint64_t xhci_port_read(void *ptr, target_phys_addr_t reg, unsigned size)
|
||||
{
|
||||
uint32_t port = reg >> 4;
|
||||
XHCIPort *port = ptr;
|
||||
uint32_t ret;
|
||||
|
||||
if (port >= xhci->numports) {
|
||||
fprintf(stderr, "xhci_port_read: port %d out of bounds\n", port);
|
||||
ret = 0;
|
||||
goto out;
|
||||
}
|
||||
|
||||
switch (reg & 0xf) {
|
||||
switch (reg) {
|
||||
case 0x00: /* PORTSC */
|
||||
ret = xhci->ports[port].portsc;
|
||||
ret = port->portsc;
|
||||
break;
|
||||
case 0x04: /* PORTPMSC */
|
||||
case 0x08: /* PORTLI */
|
||||
@ -2436,30 +2448,25 @@ static uint32_t xhci_port_read(XHCIState *xhci, uint32_t reg)
|
||||
case 0x0c: /* reserved */
|
||||
default:
|
||||
fprintf(stderr, "xhci_port_read (port %d): reg 0x%x unimplemented\n",
|
||||
port, reg);
|
||||
port->portnr, (uint32_t)reg);
|
||||
ret = 0;
|
||||
}
|
||||
|
||||
out:
|
||||
trace_usb_xhci_port_read(port, reg & 0x0f, ret);
|
||||
trace_usb_xhci_port_read(port->portnr, reg, ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void xhci_port_write(XHCIState *xhci, uint32_t reg, uint32_t val)
|
||||
static void xhci_port_write(void *ptr, target_phys_addr_t reg,
|
||||
uint64_t val, unsigned size)
|
||||
{
|
||||
uint32_t port = reg >> 4;
|
||||
XHCIPort *port = ptr;
|
||||
uint32_t portsc;
|
||||
|
||||
trace_usb_xhci_port_write(port, reg & 0x0f, val);
|
||||
trace_usb_xhci_port_write(port->portnr, reg, val);
|
||||
|
||||
if (port >= xhci->numports) {
|
||||
fprintf(stderr, "xhci_port_read: port %d out of bounds\n", port);
|
||||
return;
|
||||
}
|
||||
|
||||
switch (reg & 0xf) {
|
||||
switch (reg) {
|
||||
case 0x00: /* PORTSC */
|
||||
portsc = xhci->ports[port].portsc;
|
||||
portsc = port->portsc;
|
||||
/* write-1-to-clear bits*/
|
||||
portsc &= ~(val & (PORTSC_CSC|PORTSC_PEC|PORTSC_WRC|PORTSC_OCC|
|
||||
PORTSC_PRC|PORTSC_PLC|PORTSC_CEC));
|
||||
@ -2474,16 +2481,16 @@ static void xhci_port_write(XHCIState *xhci, uint32_t reg, uint32_t val)
|
||||
/* write-1-to-start bits */
|
||||
if (val & PORTSC_PR) {
|
||||
DPRINTF("xhci: port %d reset\n", port);
|
||||
usb_device_reset(xhci->ports[port].uport->dev);
|
||||
usb_device_reset(port->uport->dev);
|
||||
portsc |= PORTSC_PRC | PORTSC_PED;
|
||||
}
|
||||
xhci->ports[port].portsc = portsc;
|
||||
port->portsc = portsc;
|
||||
break;
|
||||
case 0x04: /* PORTPMSC */
|
||||
case 0x08: /* PORTLI */
|
||||
default:
|
||||
fprintf(stderr, "xhci_port_write (port %d): reg 0x%x unimplemented\n",
|
||||
port, reg);
|
||||
port->portnr, (uint32_t)reg);
|
||||
}
|
||||
}
|
||||
|
||||
@ -2492,10 +2499,6 @@ static uint64_t xhci_oper_read(void *ptr, target_phys_addr_t reg, unsigned size)
|
||||
XHCIState *xhci = ptr;
|
||||
uint32_t ret;
|
||||
|
||||
if (reg >= 0x400) {
|
||||
return xhci_port_read(xhci, reg - 0x400);
|
||||
}
|
||||
|
||||
switch (reg) {
|
||||
case 0x00: /* USBCMD */
|
||||
ret = xhci->usbcmd;
|
||||
@ -2538,11 +2541,6 @@ static void xhci_oper_write(void *ptr, target_phys_addr_t reg,
|
||||
{
|
||||
XHCIState *xhci = ptr;
|
||||
|
||||
if (reg >= 0x400) {
|
||||
xhci_port_write(xhci, reg - 0x400, val);
|
||||
return;
|
||||
}
|
||||
|
||||
trace_usb_xhci_oper_write(reg, val);
|
||||
|
||||
switch (reg) {
|
||||
@ -2761,6 +2759,14 @@ static const MemoryRegionOps xhci_oper_ops = {
|
||||
.endianness = DEVICE_LITTLE_ENDIAN,
|
||||
};
|
||||
|
||||
static const MemoryRegionOps xhci_port_ops = {
|
||||
.read = xhci_port_read,
|
||||
.write = xhci_port_write,
|
||||
.valid.min_access_size = 4,
|
||||
.valid.max_access_size = 4,
|
||||
.endianness = DEVICE_LITTLE_ENDIAN,
|
||||
};
|
||||
|
||||
static const MemoryRegionOps xhci_runtime_ops = {
|
||||
.read = xhci_runtime_read,
|
||||
.write = xhci_runtime_write,
|
||||
@ -2821,12 +2827,20 @@ static void xhci_complete(USBPort *port, USBPacket *packet)
|
||||
xhci_kick_ep(xfer->xhci, xfer->slotid, xfer->epid);
|
||||
}
|
||||
|
||||
static void xhci_child_detach(USBPort *port, USBDevice *child)
|
||||
static void xhci_child_detach(USBPort *uport, USBDevice *child)
|
||||
{
|
||||
FIXME();
|
||||
USBBus *bus = usb_bus_from_device(child);
|
||||
XHCIState *xhci = container_of(bus, XHCIState, bus);
|
||||
int i;
|
||||
|
||||
for (i = 0; i < MAXSLOTS; i++) {
|
||||
if (xhci->slots[i].uport == uport) {
|
||||
xhci->slots[i].uport = NULL;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static USBPortOps xhci_port_ops = {
|
||||
static USBPortOps xhci_uport_ops = {
|
||||
.attach = xhci_attach,
|
||||
.detach = xhci_detach,
|
||||
.wakeup = xhci_wakeup,
|
||||
@ -2906,6 +2920,7 @@ static void usb_xhci_init(XHCIState *xhci, DeviceState *dev)
|
||||
USB_SPEED_MASK_LOW |
|
||||
USB_SPEED_MASK_FULL |
|
||||
USB_SPEED_MASK_HIGH;
|
||||
snprintf(port->name, sizeof(port->name), "usb2 port #%d", i+1);
|
||||
speedmask |= port->speedmask;
|
||||
}
|
||||
if (i < xhci->numports_3) {
|
||||
@ -2913,16 +2928,17 @@ static void usb_xhci_init(XHCIState *xhci, DeviceState *dev)
|
||||
port->portnr = i + 1 + xhci->numports_2;
|
||||
port->uport = &xhci->uports[i];
|
||||
port->speedmask = USB_SPEED_MASK_SUPER;
|
||||
snprintf(port->name, sizeof(port->name), "usb3 port #%d", i+1);
|
||||
speedmask |= port->speedmask;
|
||||
}
|
||||
usb_register_port(&xhci->bus, &xhci->uports[i], xhci, i,
|
||||
&xhci_port_ops, speedmask);
|
||||
&xhci_uport_ops, speedmask);
|
||||
}
|
||||
}
|
||||
|
||||
static int usb_xhci_initfn(struct PCIDevice *dev)
|
||||
{
|
||||
int ret;
|
||||
int i, ret;
|
||||
|
||||
XHCIState *xhci = DO_UPCAST(XHCIState, pci_dev, dev);
|
||||
|
||||
@ -2941,7 +2957,7 @@ static int usb_xhci_initfn(struct PCIDevice *dev)
|
||||
memory_region_init_io(&xhci->mem_cap, &xhci_cap_ops, xhci,
|
||||
"capabilities", LEN_CAP);
|
||||
memory_region_init_io(&xhci->mem_oper, &xhci_oper_ops, xhci,
|
||||
"operational", 0x400 + 0x10 * xhci->numports);
|
||||
"operational", 0x400);
|
||||
memory_region_init_io(&xhci->mem_runtime, &xhci_runtime_ops, xhci,
|
||||
"runtime", LEN_RUNTIME);
|
||||
memory_region_init_io(&xhci->mem_doorbell, &xhci_doorbell_ops, xhci,
|
||||
@ -2952,6 +2968,15 @@ static int usb_xhci_initfn(struct PCIDevice *dev)
|
||||
memory_region_add_subregion(&xhci->mem, OFF_RUNTIME, &xhci->mem_runtime);
|
||||
memory_region_add_subregion(&xhci->mem, OFF_DOORBELL, &xhci->mem_doorbell);
|
||||
|
||||
for (i = 0; i < xhci->numports; i++) {
|
||||
XHCIPort *port = &xhci->ports[i];
|
||||
uint32_t offset = OFF_OPER + 0x400 + 0x10 * i;
|
||||
port->xhci = xhci;
|
||||
memory_region_init_io(&port->mem, &xhci_port_ops, port,
|
||||
port->name, 0x10);
|
||||
memory_region_add_subregion(&xhci->mem, offset, &port->mem);
|
||||
}
|
||||
|
||||
pci_register_bar(&xhci->pci_dev, 0,
|
||||
PCI_BASE_ADDRESS_SPACE_MEMORY|PCI_BASE_ADDRESS_MEM_TYPE_64,
|
||||
&xhci->mem);
|
||||
|
||||
@ -28,19 +28,25 @@ int usb_packet_map(USBPacket *p, QEMUSGList *sgl)
|
||||
{
|
||||
DMADirection dir = (p->pid == USB_TOKEN_IN) ?
|
||||
DMA_DIRECTION_FROM_DEVICE : DMA_DIRECTION_TO_DEVICE;
|
||||
dma_addr_t len;
|
||||
void *mem;
|
||||
int i;
|
||||
|
||||
for (i = 0; i < sgl->nsg; i++) {
|
||||
len = sgl->sg[i].len;
|
||||
mem = dma_memory_map(sgl->dma, sgl->sg[i].base, &len, dir);
|
||||
if (!mem) {
|
||||
goto err;
|
||||
}
|
||||
qemu_iovec_add(&p->iov, mem, len);
|
||||
if (len != sgl->sg[i].len) {
|
||||
goto err;
|
||||
dma_addr_t base = sgl->sg[i].base;
|
||||
dma_addr_t len = sgl->sg[i].len;
|
||||
|
||||
while (len) {
|
||||
dma_addr_t xlen = len;
|
||||
mem = dma_memory_map(sgl->dma, sgl->sg[i].base, &xlen, dir);
|
||||
if (!mem) {
|
||||
goto err;
|
||||
}
|
||||
if (xlen > len) {
|
||||
xlen = len;
|
||||
}
|
||||
qemu_iovec_add(&p->iov, mem, xlen);
|
||||
len -= xlen;
|
||||
base += xlen;
|
||||
}
|
||||
}
|
||||
return 0;
|
||||
|
||||
Loading…
Reference in New Issue
Block a user