softmmu: make do_unaligned_access a method of CPU
We will reference it from more files in the next patch. To avoid ruining the small steps we're making towards multi-target, make it a method of CPU rather than just a global. Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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ca0aa40816
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93e22326d6
@ -155,7 +155,8 @@ WORD_TYPE helper_le_ld_name(CPUArchState *env, target_ulong addr, int mmu_idx,
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!= (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) {
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#ifdef ALIGNED_ONLY
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if ((addr & (DATA_SIZE - 1)) != 0) {
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do_unaligned_access(env, addr, READ_ACCESS_TYPE, mmu_idx, retaddr);
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cpu_unaligned_access(ENV_GET_CPU(env), addr, READ_ACCESS_TYPE,
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mmu_idx, retaddr);
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}
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#endif
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tlb_fill(ENV_GET_CPU(env), addr, READ_ACCESS_TYPE, mmu_idx, retaddr);
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@ -186,7 +187,8 @@ WORD_TYPE helper_le_ld_name(CPUArchState *env, target_ulong addr, int mmu_idx,
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unsigned shift;
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do_unaligned_access:
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#ifdef ALIGNED_ONLY
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do_unaligned_access(env, addr, READ_ACCESS_TYPE, mmu_idx, retaddr);
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cpu_unaligned_access(ENV_GET_CPU(env), addr, READ_ACCESS_TYPE,
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mmu_idx, retaddr);
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#endif
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addr1 = addr & ~(DATA_SIZE - 1);
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addr2 = addr1 + DATA_SIZE;
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@ -204,7 +206,8 @@ WORD_TYPE helper_le_ld_name(CPUArchState *env, target_ulong addr, int mmu_idx,
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/* Handle aligned access or unaligned access in the same page. */
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#ifdef ALIGNED_ONLY
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if ((addr & (DATA_SIZE - 1)) != 0) {
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do_unaligned_access(env, addr, READ_ACCESS_TYPE, mmu_idx, retaddr);
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cpu_unaligned_access(ENV_GET_CPU(env), addr, READ_ACCESS_TYPE,
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mmu_idx, retaddr);
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}
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#endif
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@ -237,7 +240,8 @@ WORD_TYPE helper_be_ld_name(CPUArchState *env, target_ulong addr, int mmu_idx,
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!= (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) {
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#ifdef ALIGNED_ONLY
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if ((addr & (DATA_SIZE - 1)) != 0) {
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do_unaligned_access(env, addr, READ_ACCESS_TYPE, mmu_idx, retaddr);
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cpu_unaligned_access(ENV_GET_CPU(env), addr, READ_ACCESS_TYPE,
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mmu_idx, retaddr);
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}
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#endif
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tlb_fill(ENV_GET_CPU(env), addr, READ_ACCESS_TYPE, mmu_idx, retaddr);
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@ -268,7 +272,8 @@ WORD_TYPE helper_be_ld_name(CPUArchState *env, target_ulong addr, int mmu_idx,
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unsigned shift;
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do_unaligned_access:
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#ifdef ALIGNED_ONLY
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do_unaligned_access(env, addr, READ_ACCESS_TYPE, mmu_idx, retaddr);
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cpu_unaligned_access(ENV_GET_CPU(env), addr, READ_ACCESS_TYPE,
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mmu_idx, retaddr);
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#endif
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addr1 = addr & ~(DATA_SIZE - 1);
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addr2 = addr1 + DATA_SIZE;
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@ -286,7 +291,8 @@ WORD_TYPE helper_be_ld_name(CPUArchState *env, target_ulong addr, int mmu_idx,
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/* Handle aligned access or unaligned access in the same page. */
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#ifdef ALIGNED_ONLY
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if ((addr & (DATA_SIZE - 1)) != 0) {
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do_unaligned_access(env, addr, READ_ACCESS_TYPE, mmu_idx, retaddr);
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cpu_unaligned_access(ENV_GET_CPU(env), addr, READ_ACCESS_TYPE,
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mmu_idx, retaddr);
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}
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#endif
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@ -357,7 +363,7 @@ void helper_le_st_name(CPUArchState *env, target_ulong addr, DATA_TYPE val,
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!= (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) {
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#ifdef ALIGNED_ONLY
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if ((addr & (DATA_SIZE - 1)) != 0) {
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do_unaligned_access(env, addr, 1, mmu_idx, retaddr);
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cpu_unaligned_access(ENV_GET_CPU(env), addr, 1, mmu_idx, retaddr);
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}
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#endif
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tlb_fill(ENV_GET_CPU(env), addr, 1, mmu_idx, retaddr);
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@ -386,7 +392,7 @@ void helper_le_st_name(CPUArchState *env, target_ulong addr, DATA_TYPE val,
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int i;
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do_unaligned_access:
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#ifdef ALIGNED_ONLY
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do_unaligned_access(env, addr, 1, mmu_idx, retaddr);
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cpu_unaligned_access(ENV_GET_CPU(env), addr, 1, mmu_idx, retaddr);
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#endif
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/* XXX: not efficient, but simple */
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/* Note: relies on the fact that tlb_fill() does not remove the
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@ -405,7 +411,7 @@ void helper_le_st_name(CPUArchState *env, target_ulong addr, DATA_TYPE val,
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/* Handle aligned access or unaligned access in the same page. */
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#ifdef ALIGNED_ONLY
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if ((addr & (DATA_SIZE - 1)) != 0) {
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do_unaligned_access(env, addr, 1, mmu_idx, retaddr);
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cpu_unaligned_access(ENV_GET_CPU(env), addr, 1, mmu_idx, retaddr);
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}
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#endif
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@ -433,7 +439,7 @@ void helper_be_st_name(CPUArchState *env, target_ulong addr, DATA_TYPE val,
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!= (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) {
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#ifdef ALIGNED_ONLY
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if ((addr & (DATA_SIZE - 1)) != 0) {
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do_unaligned_access(env, addr, 1, mmu_idx, retaddr);
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cpu_unaligned_access(ENV_GET_CPU(env), addr, 1, mmu_idx, retaddr);
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}
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#endif
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tlb_fill(ENV_GET_CPU(env), addr, 1, mmu_idx, retaddr);
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@ -462,7 +468,7 @@ void helper_be_st_name(CPUArchState *env, target_ulong addr, DATA_TYPE val,
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int i;
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do_unaligned_access:
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#ifdef ALIGNED_ONLY
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do_unaligned_access(env, addr, 1, mmu_idx, retaddr);
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cpu_unaligned_access(ENV_GET_CPU(env), addr, 1, mmu_idx, retaddr);
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#endif
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/* XXX: not efficient, but simple */
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/* Note: relies on the fact that tlb_fill() does not remove the
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@ -481,7 +487,7 @@ void helper_be_st_name(CPUArchState *env, target_ulong addr, DATA_TYPE val,
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/* Handle aligned access or unaligned access in the same page. */
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#ifdef ALIGNED_ONLY
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if ((addr & (DATA_SIZE - 1)) != 0) {
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do_unaligned_access(env, addr, 1, mmu_idx, retaddr);
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cpu_unaligned_access(ENV_GET_CPU(env), addr, 1, mmu_idx, retaddr);
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}
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#endif
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@ -80,6 +80,8 @@ struct TranslationBlock;
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* @has_work: Callback for checking if there is work to do.
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* @do_interrupt: Callback for interrupt handling.
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* @do_unassigned_access: Callback for unassigned access handling.
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* @do_unaligned_access: Callback for unaligned access handling, if
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* the target defines #ALIGNED_ONLY.
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* @memory_rw_debug: Callback for GDB memory access.
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* @dump_state: Callback for dumping state.
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* @dump_statistics: Callback for dumping statistics.
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@ -112,6 +114,8 @@ typedef struct CPUClass {
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bool (*has_work)(CPUState *cpu);
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void (*do_interrupt)(CPUState *cpu);
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CPUUnassignedAccess do_unassigned_access;
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void (*do_unaligned_access)(CPUState *cpu, vaddr addr,
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int is_write, int is_user, uintptr_t retaddr);
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int (*memory_rw_debug)(CPUState *cpu, vaddr addr,
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uint8_t *buf, int len, bool is_write);
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void (*dump_state)(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
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@ -544,8 +548,7 @@ void cpu_interrupt(CPUState *cpu, int mask);
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#endif /* USER_ONLY */
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#ifndef CONFIG_USER_ONLY
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#ifdef CONFIG_SOFTMMU
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static inline void cpu_unassigned_access(CPUState *cpu, hwaddr addr,
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bool is_write, bool is_exec,
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int opaque, unsigned size)
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@ -557,6 +560,14 @@ static inline void cpu_unassigned_access(CPUState *cpu, hwaddr addr,
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}
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}
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static inline void cpu_unaligned_access(CPUState *cpu, vaddr addr,
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int is_write, int is_user,
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uintptr_t retaddr)
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{
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CPUClass *cc = CPU_GET_CLASS(cpu);
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return cc->do_unaligned_access(cpu, addr, is_write, is_user, retaddr);
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}
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#endif
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/**
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@ -84,5 +84,7 @@ void alpha_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf,
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hwaddr alpha_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
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int alpha_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
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int alpha_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
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void alpha_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
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int is_write, int is_user, uintptr_t retaddr);
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#endif
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@ -292,6 +292,7 @@ static void alpha_cpu_class_init(ObjectClass *oc, void *data)
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cc->handle_mmu_fault = alpha_cpu_handle_mmu_fault;
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#else
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cc->do_unassigned_access = alpha_cpu_unassigned_access;
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cc->do_unaligned_access = alpha_cpu_do_unaligned_access;
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cc->get_phys_page_debug = alpha_cpu_get_phys_page_debug;
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dc->vmsd = &vmstate_alpha_cpu;
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#endif
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@ -96,11 +96,11 @@ uint64_t helper_stq_c_phys(CPUAlphaState *env, uint64_t p, uint64_t v)
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return ret;
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}
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static void do_unaligned_access(CPUAlphaState *env, target_ulong addr,
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int is_write, int is_user, uintptr_t retaddr)
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void alpha_cpu_do_unaligned_access(CPUState *cs, vaddr addr,
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int is_write, int is_user, uintptr_t retaddr)
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{
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AlphaCPU *cpu = alpha_env_get_cpu(env);
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CPUState *cs = CPU(cpu);
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AlphaCPU *cpu = ALPHA_CPU(cs);
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CPUAlphaState *env = &cpu->env;
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uint64_t pc;
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uint32_t insn;
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@ -80,5 +80,7 @@ void mips_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
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hwaddr mips_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
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int mips_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
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int mips_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
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void mips_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
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int is_write, int is_user, uintptr_t retaddr);
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#endif
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@ -137,6 +137,7 @@ static void mips_cpu_class_init(ObjectClass *c, void *data)
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cc->handle_mmu_fault = mips_cpu_handle_mmu_fault;
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#else
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cc->do_unassigned_access = mips_cpu_unassigned_access;
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cc->do_unaligned_access = mips_cpu_do_unaligned_access;
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cc->get_phys_page_debug = mips_cpu_get_phys_page_debug;
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#endif
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@ -2128,10 +2128,6 @@ void helper_wait(CPUMIPSState *env)
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#if !defined(CONFIG_USER_ONLY)
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static void QEMU_NORETURN do_unaligned_access(CPUMIPSState *env,
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target_ulong addr, int is_write,
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int is_user, uintptr_t retaddr);
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#define MMUSUFFIX _mmu
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#define ALIGNED_ONLY
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@ -2147,9 +2143,12 @@ static void QEMU_NORETURN do_unaligned_access(CPUMIPSState *env,
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#define SHIFT 3
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#include "exec/softmmu_template.h"
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static void do_unaligned_access(CPUMIPSState *env, target_ulong addr,
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int is_write, int is_user, uintptr_t retaddr)
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void mips_cpu_do_unaligned_access(CPUState *cs, vaddr addr,
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int is_write, int is_user, uintptr_t retaddr)
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{
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MIPSCPU *cpu = MIPS_CPU(cs);
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CPUMIPSState *env = &cpu->env;
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env->CP0_BadVAddr = addr;
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do_raise_exception(env, (is_write == 1) ? EXCP_AdES : EXCP_AdEL, retaddr);
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}
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@ -81,5 +81,8 @@ void sparc_cpu_dump_state(CPUState *cpu, FILE *f,
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hwaddr sparc_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
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int sparc_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
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int sparc_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
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void QEMU_NORETURN sparc_cpu_do_unaligned_access(CPUState *cpu,
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vaddr addr, int is_write,
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int is_user, uintptr_t retaddr);
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#endif
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@ -825,6 +825,7 @@ static void sparc_cpu_class_init(ObjectClass *oc, void *data)
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cc->handle_mmu_fault = sparc_cpu_handle_mmu_fault;
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#else
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cc->do_unassigned_access = sparc_cpu_unassigned_access;
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cc->do_unaligned_access = sparc_cpu_do_unaligned_access;
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cc->get_phys_page_debug = sparc_cpu_get_phys_page_debug;
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#endif
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@ -65,9 +65,6 @@
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#define QT1 (env->qt1)
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#if !defined(CONFIG_USER_ONLY)
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static void QEMU_NORETURN do_unaligned_access(CPUSPARCState *env,
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target_ulong addr, int is_write,
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int is_user, uintptr_t retaddr);
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#include "exec/softmmu_exec.h"
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#define MMUSUFFIX _mmu
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#define ALIGNED_ONLY
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@ -2425,11 +2422,13 @@ void sparc_cpu_unassigned_access(CPUState *cs, hwaddr addr,
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#endif
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#if !defined(CONFIG_USER_ONLY)
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static void QEMU_NORETURN do_unaligned_access(CPUSPARCState *env,
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target_ulong addr, int is_write,
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int is_user, uintptr_t retaddr)
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void QEMU_NORETURN sparc_cpu_do_unaligned_access(CPUState *cs,
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vaddr addr, int is_write,
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int is_user, uintptr_t retaddr)
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{
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SPARCCPU *cpu = sparc_env_get_cpu(env);
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SPARCCPU *cpu = SPARC_CPU(cs);
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CPUSPARCState *env = &cpu->env;
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#ifdef DEBUG_UNALIGNED
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printf("Unaligned access to 0x" TARGET_FMT_lx " from 0x" TARGET_FMT_lx
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"\n", addr, env->pc);
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@ -89,5 +89,7 @@ void xtensa_cpu_dump_state(CPUState *cpu, FILE *f,
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hwaddr xtensa_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
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int xtensa_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
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int xtensa_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
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void xtensa_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
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int is_write, int is_user, uintptr_t retaddr);
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#endif
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@ -148,6 +148,7 @@ static void xtensa_cpu_class_init(ObjectClass *oc, void *data)
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cc->gdb_read_register = xtensa_cpu_gdb_read_register;
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cc->gdb_write_register = xtensa_cpu_gdb_write_register;
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#ifndef CONFIG_USER_ONLY
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cc->do_unaligned_access = xtensa_cpu_do_unaligned_access;
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cc->get_phys_page_debug = xtensa_cpu_get_phys_page_debug;
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#endif
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dc->vmsd = &vmstate_xtensa_cpu;
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@ -31,9 +31,6 @@
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#include "exec/softmmu_exec.h"
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#include "exec/address-spaces.h"
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static void do_unaligned_access(CPUXtensaState *env,
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target_ulong addr, int is_write, int is_user, uintptr_t retaddr);
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#define ALIGNED_ONLY
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#define MMUSUFFIX _mmu
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@ -49,10 +46,11 @@ static void do_unaligned_access(CPUXtensaState *env,
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#define SHIFT 3
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#include "exec/softmmu_template.h"
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static void do_unaligned_access(CPUXtensaState *env,
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target_ulong addr, int is_write, int is_user, uintptr_t retaddr)
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void xtensa_cpu_do_unaligned_access(CPUState *cs,
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vaddr addr, int is_write, int is_user, uintptr_t retaddr)
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{
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XtensaCPU *cpu = xtensa_env_get_cpu(env);
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XtensaCPU *cpu = XTENSA_CPU(cs);
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CPUXtensaState *env = &cpu->env;
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if (xtensa_option_enabled(env->config, XTENSA_OPTION_UNALIGNED_EXCEPTION) &&
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!xtensa_option_enabled(env->config, XTENSA_OPTION_HW_ALIGNMENT)) {
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