ARM back-end: Handle all possible immediates for ALU ops
this patch handles all possible constants for immediate operand of ALU ops. I'm not very satisfied by the implementation. Laurent Signed-off-by: Laurent Desnogues <laurent.desnogues@gmail.com> Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com>
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@ -179,11 +179,36 @@ static int target_parse_constraint(TCGArgConstraint *ct, const char **pct_str)
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return 0;
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}
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static inline uint32_t rotl(uint32_t val, int n)
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{
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return (val << n) | (val >> (32 - n));
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}
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/* ARM immediates for ALU instructions are made of an unsigned 8-bit
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right-rotated by an even amount between 0 and 30. */
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static inline int encode_imm(uint32_t imm)
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{
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/* simple case, only lower bits */
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if ((imm & ~0xff) == 0)
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return 0;
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/* then try a simple even shift */
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shift = ctz32(imm) & ~1;
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if (((imm >> shift) & ~0xff) == 0)
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return 32 - shift;
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/* now try harder with rotations */
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if ((rotl(imm, 2) & ~0xff) == 0)
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return 2;
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if ((rotl(imm, 4) & ~0xff) == 0)
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return 4;
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if ((rotl(imm, 6) & ~0xff) == 0)
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return 6;
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/* imm can't be encoded */
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return -1;
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}
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static inline int check_fit_imm(uint32_t imm)
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{
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/* XXX: use rotation */
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return (imm & ~0xff) == 0;
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return encode_imm(imm) >= 0;
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}
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/* Test if a constant matches the constraint.
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@ -1407,10 +1432,12 @@ static inline void tcg_out_op(TCGContext *s, int opc,
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c = ARITH_EOR;
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/* Fall through. */
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gen_arith:
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if (const_args[2])
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if (const_args[2]) {
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int rot;
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rot = encode_imm(args[2]);
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tcg_out_dat_imm(s, COND_AL, c,
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args[0], args[1], args[2]);
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else
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args[0], args[1], rotl(args[2], rot) | (rot << 7));
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} else
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tcg_out_dat_reg(s, COND_AL, c,
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args[0], args[1], args[2], SHIFT_IMM_LSL(0));
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break;
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