hw/riscv: virt: Add optional ACLINT support to virt machine
We extend virt machine to emulate ACLINT devices only when "aclint=on" parameter is passed along with machine name in QEMU command-line. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Message-id: 20210831110603.338681-5-anup.patel@wdc.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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@ -53,6 +53,16 @@ with the default OpenSBI firmware image as the -bios. It also supports
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the recommended RISC-V bootflow: U-Boot SPL (M-mode) loads OpenSBI fw_dynamic
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firmware and U-Boot proper (S-mode), using the standard -bios functionality.
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Machine-specific options
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------------------------
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The following machine-specific options are supported:
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- aclint=[on|off]
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When this option is "on", ACLINT devices will be emulated instead of
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SiFive CLINT. When not specified, this option is assumed to be "off".
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Running Linux kernel
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--------------------
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111
hw/riscv/virt.c
111
hw/riscv/virt.c
@ -48,6 +48,7 @@ static const MemMapEntry virt_memmap[] = {
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[VIRT_TEST] = { 0x100000, 0x1000 },
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[VIRT_RTC] = { 0x101000, 0x1000 },
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[VIRT_CLINT] = { 0x2000000, 0x10000 },
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[VIRT_ACLINT_SSWI] = { 0x2F00000, 0x4000 },
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[VIRT_PCIE_PIO] = { 0x3000000, 0x10000 },
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[VIRT_PLIC] = { 0xc000000, VIRT_PLIC_SIZE(VIRT_CPUS_MAX * 2) },
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[VIRT_UART0] = { 0x10000000, 0x100 },
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@ -281,6 +282,82 @@ static void create_fdt_socket_clint(RISCVVirtState *s,
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g_free(clint_cells);
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}
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static void create_fdt_socket_aclint(RISCVVirtState *s,
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const MemMapEntry *memmap, int socket,
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uint32_t *intc_phandles)
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{
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int cpu;
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char *name;
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unsigned long addr;
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uint32_t aclint_cells_size;
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uint32_t *aclint_mswi_cells;
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uint32_t *aclint_sswi_cells;
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uint32_t *aclint_mtimer_cells;
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MachineState *mc = MACHINE(s);
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aclint_mswi_cells = g_new0(uint32_t, s->soc[socket].num_harts * 2);
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aclint_mtimer_cells = g_new0(uint32_t, s->soc[socket].num_harts * 2);
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aclint_sswi_cells = g_new0(uint32_t, s->soc[socket].num_harts * 2);
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for (cpu = 0; cpu < s->soc[socket].num_harts; cpu++) {
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aclint_mswi_cells[cpu * 2 + 0] = cpu_to_be32(intc_phandles[cpu]);
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aclint_mswi_cells[cpu * 2 + 1] = cpu_to_be32(IRQ_M_SOFT);
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aclint_mtimer_cells[cpu * 2 + 0] = cpu_to_be32(intc_phandles[cpu]);
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aclint_mtimer_cells[cpu * 2 + 1] = cpu_to_be32(IRQ_M_TIMER);
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aclint_sswi_cells[cpu * 2 + 0] = cpu_to_be32(intc_phandles[cpu]);
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aclint_sswi_cells[cpu * 2 + 1] = cpu_to_be32(IRQ_S_SOFT);
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}
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aclint_cells_size = s->soc[socket].num_harts * sizeof(uint32_t) * 2;
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addr = memmap[VIRT_CLINT].base + (memmap[VIRT_CLINT].size * socket);
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name = g_strdup_printf("/soc/mswi@%lx", addr);
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qemu_fdt_add_subnode(mc->fdt, name);
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qemu_fdt_setprop_string(mc->fdt, name, "compatible", "riscv,aclint-mswi");
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qemu_fdt_setprop_cells(mc->fdt, name, "reg",
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0x0, addr, 0x0, RISCV_ACLINT_SWI_SIZE);
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qemu_fdt_setprop(mc->fdt, name, "interrupts-extended",
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aclint_mswi_cells, aclint_cells_size);
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qemu_fdt_setprop(mc->fdt, name, "interrupt-controller", NULL, 0);
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qemu_fdt_setprop_cell(mc->fdt, name, "#interrupt-cells", 0);
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riscv_socket_fdt_write_id(mc, mc->fdt, name, socket);
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g_free(name);
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addr = memmap[VIRT_CLINT].base + RISCV_ACLINT_SWI_SIZE +
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(memmap[VIRT_CLINT].size * socket);
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name = g_strdup_printf("/soc/mtimer@%lx", addr);
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qemu_fdt_add_subnode(mc->fdt, name);
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qemu_fdt_setprop_string(mc->fdt, name, "compatible",
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"riscv,aclint-mtimer");
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qemu_fdt_setprop_cells(mc->fdt, name, "reg",
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0x0, addr + RISCV_ACLINT_DEFAULT_MTIME,
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0x0, memmap[VIRT_CLINT].size - RISCV_ACLINT_SWI_SIZE -
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RISCV_ACLINT_DEFAULT_MTIME,
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0x0, addr + RISCV_ACLINT_DEFAULT_MTIMECMP,
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0x0, RISCV_ACLINT_DEFAULT_MTIME);
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qemu_fdt_setprop(mc->fdt, name, "interrupts-extended",
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aclint_mtimer_cells, aclint_cells_size);
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riscv_socket_fdt_write_id(mc, mc->fdt, name, socket);
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g_free(name);
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addr = memmap[VIRT_ACLINT_SSWI].base +
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(memmap[VIRT_ACLINT_SSWI].size * socket);
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name = g_strdup_printf("/soc/sswi@%lx", addr);
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qemu_fdt_add_subnode(mc->fdt, name);
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qemu_fdt_setprop_string(mc->fdt, name, "compatible", "riscv,aclint-sswi");
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qemu_fdt_setprop_cells(mc->fdt, name, "reg",
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0x0, addr, 0x0, memmap[VIRT_ACLINT_SSWI].size);
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qemu_fdt_setprop(mc->fdt, name, "interrupts-extended",
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aclint_sswi_cells, aclint_cells_size);
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qemu_fdt_setprop(mc->fdt, name, "interrupt-controller", NULL, 0);
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qemu_fdt_setprop_cell(mc->fdt, name, "#interrupt-cells", 0);
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riscv_socket_fdt_write_id(mc, mc->fdt, name, socket);
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g_free(name);
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g_free(aclint_mswi_cells);
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g_free(aclint_mtimer_cells);
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g_free(aclint_sswi_cells);
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}
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static void create_fdt_socket_plic(RISCVVirtState *s,
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const MemMapEntry *memmap, int socket,
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uint32_t *phandle, uint32_t *intc_phandles,
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@ -359,7 +436,11 @@ static void create_fdt_sockets(RISCVVirtState *s, const MemMapEntry *memmap,
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create_fdt_socket_memory(s, memmap, socket);
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if (s->have_aclint) {
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create_fdt_socket_aclint(s, memmap, socket, intc_phandles);
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} else {
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create_fdt_socket_clint(s, memmap, socket, intc_phandles);
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}
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create_fdt_socket_plic(s, memmap, socket, phandle,
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intc_phandles, xplic_phandles);
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@ -750,6 +831,14 @@ static void virt_machine_init(MachineState *machine)
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RISCV_ACLINT_DEFAULT_MTIMECMP, RISCV_ACLINT_DEFAULT_MTIME,
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RISCV_ACLINT_DEFAULT_TIMEBASE_FREQ, true);
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/* Per-socket ACLINT SSWI */
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if (s->have_aclint) {
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riscv_aclint_swi_create(
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memmap[VIRT_ACLINT_SSWI].base +
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i * memmap[VIRT_ACLINT_SSWI].size,
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base_hartid, hart_count, true);
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}
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/* Per-socket PLIC hart topology configuration string */
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plic_hart_config = plic_hart_config_string(hart_count);
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@ -914,6 +1003,22 @@ static void virt_machine_instance_init(Object *obj)
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{
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}
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static bool virt_get_aclint(Object *obj, Error **errp)
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{
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MachineState *ms = MACHINE(obj);
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RISCVVirtState *s = RISCV_VIRT_MACHINE(ms);
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return s->have_aclint;
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}
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static void virt_set_aclint(Object *obj, bool value, Error **errp)
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{
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MachineState *ms = MACHINE(obj);
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RISCVVirtState *s = RISCV_VIRT_MACHINE(ms);
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s->have_aclint = value;
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}
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static void virt_machine_class_init(ObjectClass *oc, void *data)
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{
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MachineClass *mc = MACHINE_CLASS(oc);
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@ -929,6 +1034,12 @@ static void virt_machine_class_init(ObjectClass *oc, void *data)
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mc->numa_mem_supported = true;
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machine_class_allow_dynamic_sysbus_dev(mc, TYPE_RAMFB_DEVICE);
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object_class_property_add_bool(oc, "aclint", virt_get_aclint,
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virt_set_aclint);
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object_class_property_set_description(oc, "aclint",
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"Set on/off to enable/disable "
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"emulating ACLINT devices");
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}
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static const TypeInfo virt_machine_typeinfo = {
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@ -43,6 +43,7 @@ struct RISCVVirtState {
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FWCfgState *fw_cfg;
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int fdt_size;
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bool have_aclint;
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};
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enum {
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@ -51,6 +52,7 @@ enum {
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VIRT_TEST,
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VIRT_RTC,
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VIRT_CLINT,
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VIRT_ACLINT_SSWI,
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VIRT_PLIC,
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VIRT_UART0,
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VIRT_VIRTIO,
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