CR0.MP/EM/TS support - native fpu support in code copy mode
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@640 c046a42c-6fe2-441c-8c8c-71466251a162
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@ -267,6 +267,9 @@ void cpu_x86_update_cr0(CPUX86State *env, uint32_t new_cr0)
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env->hflags = (env->hflags & ~HF_PE_MASK) | (pe_state << HF_PE_SHIFT);
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/* ensure that ADDSEG is always set in real mode */
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env->hflags |= ((pe_state ^ 1) << HF_ADDSEG_SHIFT);
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/* update FPU flags */
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env->hflags = (env->hflags & ~(HF_MP_MASK | HF_EM_MASK | HF_TS_MASK)) |
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((new_cr0 << (HF_MP_SHIFT - 1)) & (HF_MP_MASK | HF_EM_MASK | HF_TS_MASK));
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}
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void cpu_x86_update_cr3(CPUX86State *env, uint32_t new_cr3)
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@ -476,3 +479,73 @@ target_ulong cpu_get_phys_page_debug(CPUState *env, target_ulong addr)
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return paddr;
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}
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#endif
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#if defined(USE_CODE_COPY)
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struct fpstate {
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uint16_t fpuc;
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uint16_t dummy1;
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uint16_t fpus;
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uint16_t dummy2;
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uint16_t fptag;
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uint16_t dummy3;
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uint32_t fpip;
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uint32_t fpcs;
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uint32_t fpoo;
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uint32_t fpos;
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uint8_t fpregs1[8 * 10];
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};
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void restore_native_fp_state(CPUState *env)
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{
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int fptag, i, j;
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struct fpstate fp1, *fp = &fp1;
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fp->fpuc = env->fpuc;
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fp->fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
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fptag = 0;
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for (i=7; i>=0; i--) {
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fptag <<= 2;
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if (env->fptags[i]) {
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fptag |= 3;
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} else {
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/* the FPU automatically computes it */
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}
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}
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fp->fptag = fptag;
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j = env->fpstt;
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for(i = 0;i < 8; i++) {
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memcpy(&fp->fpregs1[i * 10], &env->fpregs[j], 10);
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j = (j + 1) & 7;
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}
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asm volatile ("frstor %0" : "=m" (*fp));
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env->native_fp_regs = 1;
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}
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void save_native_fp_state(CPUState *env)
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{
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int fptag, i, j;
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uint16_t fpuc;
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struct fpstate fp1, *fp = &fp1;
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asm volatile ("fsave %0" : : "m" (*fp));
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env->fpuc = fp->fpuc;
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env->fpstt = (fp->fpus >> 11) & 7;
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env->fpus = fp->fpus & ~0x3800;
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fptag = fp->fptag;
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for(i = 0;i < 8; i++) {
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env->fptags[i] = ((fptag & 3) == 3);
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fptag >>= 2;
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}
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j = env->fpstt;
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for(i = 0;i < 8; i++) {
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memcpy(&env->fpregs[j], &fp->fpregs1[i * 10], 10);
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j = (j + 1) & 7;
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}
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/* we must restore the default rounding state */
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/* XXX: we do not restore the exception state */
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fpuc = 0x037f | (env->fpuc & (3 << 10));
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asm volatile("fldcw %0" : : "m" (fpuc));
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env->native_fp_regs = 0;
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}
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#endif
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